About the Seymour Cray Award
New Deadline: 1 July 2017
Established in late 1997. A crystal memento, illuminated certificate, and $10,000 honorarium are awarded to recognize innovative contributions to high performance computing systems that best exemplify the creative spirit demonstrated by Seymour Cray.
The award nomination requires a minimum of 3 endorsements.
Cray Past Recipients
|2015||Mateo Valero||In recognition of seminal contributions to vector, out-of-order, multithreaded, and VLIW architectures.|
|2014||Gordon Bell||For his exceptional contributions in designing and bringing several computer systems to market that changed the world of high performance computing and of computing in general, the two most important of these being the PDP-6 and the VAX-11/780.|
|2013||Marc Snir||For contributions to the research, development, theory, and standardization of high-performance parallel computing including the IBM RS/6000 SP and Blue Gene systems.|
|2012||Peter M. Kogge||For innovations in advanced computer architecture and systems.|
|2011||Charles L. Seitz||For innovations in high-performance message passing architectures and networks.|
|2010||Alan Gara||For innovations in low power, densely packaged supercomputing systems.|
|2009||Kenichi Miura||For leadership in developing groundbreaking vector supercomputing hardware and software.|
|2008||Steve Wallach||For contribution to high-performance computing through design of innovative vector and parallel computing systems, notably the Convex mini-supercomputer series, a distinguished industrial career and acts of public service.|
|2007||Kenneth E. Batcher||For fundamental theoretical and practical contributions to massively parallel computation, including parallel sorting algorithms, interconnection networks, and pioneering designs, of the STARAN and MPP computers.|
|2006||Tadashi Watanabe||For serving as lead designer of the NEC SX series of supercomputers, and especially for the design of the Earth Simulator, which was the world?s fastest supercomputer from 2002 to 2004.|
|2005||Steven L. Scott||For advancing supercomputer architecture through the development of the Cray T3E, the Cray X-1 and the Cray "Black Widow".|
|2004||William J. Dally||For fundamental contributions to the design and engineering of high-performance interconnection networks, parallel computer architectures, and high-speed signaling technology.|
|2003||Burton J. Smith||For ingenious and sustained contributions to designs and implementations at the frontier of high performance computing and especially for sustained championing of the use of multithreading to enable parallel execution and overcome latency and to achieve high performance in industrially significant products.|
|2002||Monty M. Denneau||For ingenious and sustained contributions to designs and implementations at the frontier of high performance computing leading to widely used industrial products.|
|2001||John L. Hennessy||For pioneering contributions to the foundation, teaching, and practice of high performance computing, especially in distributed shared memory multiprocessor architectures and in design and application of reduced instruction set architectures.|
|2000||Glen J. Culler||For pioneering contributions to the foundation and practice of high performance computing in array and very long instruction word (VLIW) processing especially for use in interactive scientific exploration.|
|1999||John Cocke||For unique and creative contributions to the computer industry through innovative high performance system designs.|
Cray Award Subcommittee Chair
2016 Seymour Cray Subcommittee Chair
Marc Snir, Argonne National Laboratory
Nomination Deadline for 2017 Nominations: 1 July 2017
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Cray Award Press Releases
LOS ALAMITOS, Calif., 23 September 2013 – Parallel computing expert Marc Snir, a major contributor to the Message Passing Interface, has been named the recipient of this year's IEEE Computer Society Seymour Cray Computer Engineering Award.
Marc SnirSnir is director of the Mathematics and Computer Science Division at Argonne National Laboratory and the Michael Faiman and Saburo Muroga Professor in the Department of Computer Science at the University of Illinois at Urbana-Champaign (UIUC), where he headed the Computer Science Department from 2001 to 2007. He is currently pursuing research in programming environments for high-performance computing.
One of IEEE Computer Society's highest awards, the Seymour Cray Computer Engineering Award is presented in recognition of innovative contributions to high-performance computing systems that best exemplify Cray's creative spirit. The award consists of a crystal memento, a certificate, and a $10,000 honorarium.
Until 2001, Snir was a senior manager at the IBM T. J. Watson Research Center, where he led the Scalable Parallel Systems research group responsible for major contributions to the IBM SP scalable parallel system and to the IBM Blue Gene system.
He received a PhD in mathematics from the Hebrew University of Jerusalem in 1979, worked at New York University on the NYU Ultracomputer project in 1980-1982, and was at the Hebrew University of Jerusalem in 1982-1986, before joining IBM.
An Argonne Distinguished Fellow, AAAS Fellow, ACM Fellow, and IEEE Fellow, Snir has published numerous papers and given many presentations on computational complexity, parallel algorithms, parallel architectures, interconnection networks, parallel languages, libraries, and parallel programming environments.
Cray [http://www.computer.org/portal/web/awards/seymourbio] was a US electrical engineer and supercomputer architect who designed a series of computers that for decades were the fastest in the world. He founded Cray Research, which would build many of these machines. Called "the father of supercomputing," Cray has been credited with creating the supercomputer industry.
Previous Seymour Cray Award recipients were Ken Batcher, John Cocke, Glen Culler, William J. Dally, Monty Denneau, Alan Gara, John L. Hennessy, Peter Kogge, Kenichi Miura, Steven L. Scott, Charles Seitz, Burton J. Smith, Steven Wallach, and Tadashi Watanabe.
Article Posted on 11 October 2012
University of Notre Dame Professor Peter Kogge Named 2012 Recipient of IEEE Computer Society 2012 Seymour Cray Computer Engineering Award
LOS ALAMITOS, Calif., 11 October, 2012 – University of Notre Dame computer science and engineering professor Peter Kogge, developer of the space shuttle I/O processor, the world's first multicore processor, and a number of other important innovations, has been named the recipient of the IEEE Computer Society's 2012 Seymour Cray Computer Engineering Award.
Peter KoggeKogge, the Ted H. McCourtney Professor of Computer Science and Engineering at Notre Dame since 1994, was recognized "for innovations in advanced computer architecture and systems." The Seymour Cray Award is one of the IEEE Computer Society's highest awards, and is presented in recognition of innovative contributions to high-performance computing systems that best exemplify Cray's creative spirit. The award consists of a crystal memento, certificate, and a $10,000 honorarium.
Kogge has been at the forefront of several innovations that have shaped the computing industry over the past three decades. While working on his PhD at Stanford University in the 1970s, he invented the Kogge-Stone-Adder process, what is still considered the fastest way of adding numbers in a computer. During his 26-year career at IBM, Kogge, an IBM Fellow, designed the space shuttle I/O processor, one of the first multithreaded computers and the first to fly in space. Kogge was also inventor of the world's first multicore processor, EXECUBE, which he and his IBM team placed on a memory chip in an early effort to solve the data bottleneck problem.
Co-inventor on more than three dozen patents, Kogge is also the author of two textbooks, including the first textbook on pipelining, a now ubiquitous technique for executing multiple instructions in a computer in parallel. More recently, Kogge led a team of computer professionals for the US Defense Advanced Research Projects Agency (DARPA) to explore development of a supercomputer capable of executing a quintillion mathematical operations per second.
His current research areas include massively parallel processing architectures, advanced VLSI and nanotechnologies and their relationship to computing systems architectures, non von Neumann models of programming and execution, and parallel algorithms and applications and their impact on computer architecture.
Kogge is scheduled to accept the award at the keynote session at SC12 in Salt Lake City on Tuesday morning, 13 November.
Other previous Cray recipients include Ken Batcher, John Cocke, Glen Culler, William J. Dally, Monty Denneau, Alan Gara, John L. Hennessy, Kenichi Miura, Steven L. Scott, Charles Seitz, Burton J. Smith, Steven Wallach, and Tadashi Watanabe.