Heterogeneous System Architecture: Spearheading Bold New Standards for Tomorrow’s Computing
by Dr. John Glossner
 

HSA

 

“The first 90% of the code accounts for the first 90% of the development time. The remaining 10% of the code accounts for the other 90% of the development time.” Tom Cargill, Bell Labs.

Improving software and the systems it supports have always posed a challenge. But there are those who persistently continue to improve computing with better ideas. The Heterogeneous System Architecture (HSA) Foundation represents more than 70 leading technology companies and universities.  Combining their insights and resources, they have developed HSA specifications and compliant heterogeneous systems. To date, HSA teams have made major strides in establishing heterogeneous computing standards and its applications and achievements in several critically important areas.

Leveraging the Full Power of Parallel Computing

The HSA standardized platform leverages the performance and power efficiency of parallel computing engines currently used in most electronic devices. Developers can finally apply CPUs, GPUs, DSPs, FPGAs, fabrics and fixed function accelerators found in today’s complex Systems-on-Chip (SoCs) with remarkable ease and efficiency.

This has led to considerable progress in applying HSA to artificial intelligence, robotics, ADAS/autonomous driving, IoT, software-defined communications and other applications. The drive to establish a unifying standard has spearheaded support for bold new advances. These include innovations in product development, R&D, ecosystem formation, and conformance tests in other related industries. Breakthroughs have surfaced in such key areas as standard application evaluation, instruction set architectures, system architecture, security protection, and network interconnection.

HSA Working Groups: Raising the Bar in Heterogeneous Computing

Uniting teams with diverse talents continues to take HSA computing to greater thresholds of efficiency. In a recent summit, HSA working groups in the China Regional Committee (CRC) moved forward with a number of key insights:

  • Application & System Evaluation Working Group. This team has led the way in application and development trends in artificial intelligence.
  • Interconnect Working Group. Breaking new ground in Network-on-chip in heterogeneous computing SoCs, this team has made significant strides in ‘next-step’ verification and standardization work arrangements.
  • Compilation & Runtime LIB Working Group. Engaged in vector computing and related programming models, this group continues to offer recommendations for facilitating integration into HSA system architectures.
  • System Architecture Working Group. Leveraging HSA to address software-defined communications and radio, this team is leading the way in heterogeneous multi-core chip architecture and application development.
  • Security & Protection Working Group. Focusing on adapting heterogeneous computing to ancillary areas, this working group has made major strides in security protection.

Matching the Right Processor with the Right Application

“People have no idea how fast the world is changing,” said Peter Diamandis at a recent Singularity University’s Global Summit. It’s eye opening just how many of today’s electronics are driven by SoCs. There’s little doubt that SoCs have become the heart of mobile devices, high performance computing systems, AR/VR systems, machine learning and servers. All are segueing to heterogeneous architectures made up of IP blocks. These are frequently designed and programmed in a variety of proprietary languages. This has created a “Tower of Babel” as hardware tech continues to move faster the expected, outpacing the software that supports it.

Addressing Barriers and Bottlenecks

The HSA paradigm addresses these inherent ‘barriers and bottlenecks’ by ensuring that the right processor is used for the application best suited for the job. United with cache-coherent shared virtual memory, HSA systems provide big-bandwidth access to memory and boost app performance while also reducing power consumption.

The HSA structure allows programmers to configure applications in their existing programming languages, free of concerns over native instruction set architecture (ISA) of heterogeneous processors. Programs can be  compiled to native code or to a virtual instruction set that can be later finalized to a native ISA. In many cases no specialized programmer knowledge is needed to achieve parallelization.

Most Surveyed Would Include HSA

An HSA survey of SoC companies, IP providers, software providers, academics, OEMs, OS vendors, and software developers proved quite revealing. It concluded that their systems would all include heterogeneous features. Respondents noted that they are currently leveraging CPUs, GPUs, digital signal processors FPGAs, and fixed function accelerators.

There’s no denying that heterogeneous systems are at the epicenter of today’s tech disruptions—everything from tablets and smartphones to scientific computers. Heterogeneous architectures are leading the way to the next generation of increasingly smarter devices. This has opened up vast new markets in machine learning and AI, data centers, high performance computing, mobile, AR/VR and embedded IoT.

Powerful New Tools Extend HSA’s Reach

Innovative new tools continue to enhance and extend the reach of HSA’s model. A sampling:

  • HIP—Heterogeneous-Compute Interface for Portability (HIP) adds next level mobility to CUDA programs. The first release of HIPCL demonstrates its viability and is useful for end-users. It runs most CUDA examples in the HIP repository and the list of supported CUDA applications is expected to grow as new features are added.
  • POCL—Portable Computing Language (POCL) provides a flexible open source implementation framework of the OpenCL standard. POCL helps integrate as many diverse devices as possible in a single OpenCL context. This optimizes performance at the system level, and ultimately harnessing the power of all heterogeneous devices in the system under a single API.
  • FPGAs—Field Programmable Gate Arrays (FPGAs) equip today’s systems designers with a far more robust selection of hardware to work with. Comprised mostly of simple lookup tables and flip-flops, these components are dynamically configured to form complex algorithms directly in hardware. This structure offers low latency, unlimited ability to reconfigure systems, and high-energy efficiency due to the dedicated circuitry.
  • Memory Centric Architecture—This allows heterogeneous systems to reside in the same memory address space and share memory coherently. It enables multiple processors to write to memory without first copying it to a separate address space. And it does so while allowing other processors to simultaneously read from the same location. A major portion of legacy software can also be re-used.

In its simplest form, HSA is a productivity application programming interface (API), one that leverages the power and potential of heterogeneous computing. It eliminates the ‘bottlenecks and barriers’ of traditional heterogeneous programming, allowing developers to focus on algorithms without micro-managing system resources. Applications are able to seamlessly blend scalar processing with high-performance computing on CPU’s, GPU’s, DSP’s, Image Signal Processors, VLIW’s, Neural Network Processors, FPGA’s, and more. It’s a timely innovation simplifying heterogeneous programming.