B. Ramakrishna Rau Award

Established in memory of B. Ramakrishna Rau, and awarded in recognition of his distinguished career in promoting and expanding the use of innovative computer microarchitecture techniques, including his innovation in compiler technology, his leadership in academic and industrial computer architecture, and his extremely high personal and ethical standards.

The B. Ramakrishna Rau award will be presented "in recognition of substantial contributions in the field of computer microarchitecture and compiler code generation."

The candidate will have made an outstanding, innovative contribution or contributions to microarchitecture, use of novel microarchitectural techniques or compiler/architecture interfacing. It is hoped, but not required, that the winner will have also contributed to the computer microarchitecture community through teaching, mentoring, or community service. This award will consist of a certificate and a $2,000 honorarium.

The winner will be announced and invited to present a paper and/or presentation at the ACM/IEEE International Symposium on Microarchitecture. The Rau award will be presented annually and honored to a single recipient.

Nomination Deadline: 15 June (11:59pm ET)

NOMINATE

Nomination Questions (pdf)
Nomination package requires a minimum of 3 endorsements and a maximum of 5 endorsements by the award deadline.
Learn More About B. Ramakrishna Rau

2026 B. Ramakrishna Rau Award Committee Chair

Dr. Gilles Pokam - Advanced Micro Devices, Inc. (AMD)

Past Recipients

2025 Antonio González: For contributions to the design of energy‐efficient and resilient computer architectures
2024 Todd Austin: For seminal contributions to microarchitecture, performance analysis, and innovations in secure architectures.
2023 Joel S. Emer: For pioneering contributions to microarchitectural analysis, microarchitecture features, and for bringing clarity to the field with fundamental concepts and terminology.
2022 Scott A. Mahlke: For contributions to compiler technology for instruction-level parallelism and application-specific architectures.
2021 Daniel A. Jiménez: For contributions to neural branch prediction in microprocessors.
2020 Andre Seznec: For pioneering contributions to cache design and branch prediction.
2018 Ravi Nair: For contributions to branch prediction in processors, microarchitecture techniques in heterogeneous processing, microarchitecture support for virtual machines, and near-memory processing.
2017 Guang R. Gao: For contributions to compiler techniques and microarchitectures for instruction-level and thread-level parallel computing.
2016 Gurindar S. Sohi: For pioneering techniques enabling instruction-level parallelism and speculative multithreading via cooperative resource scheduling between offline compiler and runtime micro-architecture elements.
2015 Robert P. Colwell: For contributions to critical analysis of microarchitecture and the development of the Pentium Pro processor.
2014 Wen-mei W. Hwu: For contributions to Instruction Level Parallelism technology, including compiler optimization, program representation, microarchitecture, and applications.
2013 Kemal Ebcioglu: For contributions to VLIW, instruction-level-parallelism, binary translation, Java performance, and service to the community
2012 Joseph A. (Josh) Fisher: For the development of trace scheduling compilation and pioneering work in VLIW (Very Long Instruction Word) architectures.
2011 Yale N. Patt: For significant contributions and inspiring leadership in the microarchitecture community with respect to teaching, mentoring, research, and service.