2018 Eckert-Mauchly Award Recipient

"For outstanding contributions to simultaneous multithreaded processor architectures and multiprocessor sharing and coherency."

In her Eckert-Mauchly Award acceptance speech at the 45th ISCA Conference, Susan Eggers said, “In my view, there are numerous women who could be standing here. It just happens to be me.  And, at least, in my opinion, the important event is that the technical work of a female architect has been recognized. I hope it continues.”

Eckert Mauchly Image

The Eckert-Mauchly Award recognizes outstanding contributions to computer and digital systems architecture.

The award was named for John Presper Eckert and John William Mauchly, who collaborated on the design and construction of the Electronic Numerical Integrator and Computer (ENIAC), the first large-scale computing machine, which was completed in 1947.

Next Nomination Deadline: 30 March 2019 

The award nomination requires a minimum of 3 endorsements.

A certificate and $5,000 are awarded jointly by the ACM and the Computer Society for outstanding contributions to the field of computer and digital systems architecture.


Eckert-Mauchly Award - Past Recipients


Susan Eggers

For outstanding contributions to simultaneous multithreaded processor architectures and multiprocessor sharing and coherency.



Charles P. Thacker

For pioneering contributions to the design and development of personal computer architecture including the Xerox Alto, the first tablet computers, and cache coherence protocols.



Uri Weiser

For leadership and pioneering industry and academic work in high performance processors and multimedia architectures.




Norman P. Jouppi

For pioneering contributions to the design and analysis of high-performance processors and memory systems.



Trevor Mudge

For pioneering contributions to low power computer architecture and its interaction with technology.



James R. Goodman

For pioneering contributions to the architecture of shared-memory multiprocessors.



Algirdas Avizienis

For fundamental contributions to fault-tolerant computer architecture and computer arithmetic.



Gurindar (Guri) S. Sohi

For pioneering widely used micro-architectural techniques for instruction-level parallelism.



William J. Dally

For outstanding contributions to the architecture of interconnection networks and parallel computers.



Joel S. Emer

For pioneering contributions to performance analysis and modeling methodologies; for design innovations in several significant industry microprocessors; and for deftly bridging research and development, academia and industry.


David A. Patterson

For seminal contributions to RISC microprocessor architectures, RAID storage systems design, and reliable computing, and for leadership in education and in disseminating academic research results into successful industrial products.


Mateo Valero

For extraordinary leadership in building a world class computer architecture research center, for seminal contributions in the areas of vector computing and multithreading, and for pioneering basic new approaches to instruction-level parallelism.


James H. Pomerene

For pioneering innovations in computer architecture, including early concepts in cache, reliable memories, pipelining and branch prediction, for the design of the IAS computer and for the design of the Harvest supercomputer.


Robert P. Colwell

For outstanding achievements in the design and implementation of industry-changing micro-architectures, and for significant contributions to the RISC/CISC architecture debate.


Frederick P. Brooks, Jr.

For the definition of computer architecture and contributions to the concept of computer families and to the principles of instruction set design; for seminal contributions in instruction sequencing, including interrupt systems and execute instructions; and for contributions to the IBM 360 instruction set architecture.


Joseph A. (Josh) Fisher

In recognition of 25 years of seminal contributions to instruction-level parallelism, pioneering work on VLIW architectures, and the formulation of the Trace Scheduling compilation technique.


B. Ramakrishna (Bob) Rau

For pioneering contributions to statically-scheduled instruction-level parallel processors and their compilers.



John L. Hennessy

For being the founder and chief architect of the MIPS Computer Systems and contributing to the development of the landmark MIPS R2000 microprocessor.



Edward S. Davidson

For seminal contributions to the design, implementation, and performance evaluation of high performance pipelines and multiprocessor systems.


James E. Smith

For fundamental contributions to high performance micro-architecture, including saturating counters for branch prediction, reorder buffers for precise exceptions, decoupled access/execute architectures, and vector supercomputer organization memory, and interconnects.


Tadashi Watanabe

For contributions to the architectural design of supercomputers with multiple/parallel vector pipelines and programmable vector caches.


Robert Tomasulo

For the ingenious Tomasulo's algorithm, which enabled out-of-order execution processors to be implemented.


Yale N. Patt

For important contributions to instruction level parallelism and superscalar processor design.


John H. Crawford

In recognition of your impact on the computer industry through your development of microprocessor technology.


James E. Thornton

For his pioneering work on high performance processors; for inventing the scoreboard for instruction issue; and for fundamental contributions to vector supercomputing.


David Kuck

For his impact on the field of supercomputing, including his work in shared memory multiprocessing, clustered memory hierarchies, compiler technology, and application/library tuning.


Michael J. Flynn

For his important and seminal contributions to processor organization and classification, computer arithmetic and performance evaluation.


Burton Smith

For pioneering work in the design and implementation of scalable shared memory multiprocessors.


Kenneth Batcher

For contributions to parallel computer architecture, both for pioneering theories in interconnection networks and for the pioneering implementations of parallel computers.


Seymour Cray

For a career of achievements that have advanced supercomputer design.


Daniel P. Siewiorek

For outstanding contributions in parallel computer architecture, reliability, and computer architecture education.


Gene M. Amdahl

For outstanding innovations in computer architecture, including pipelining, instruction look- ahead and cache memory.


Harvey G. Cragon

For major contributions to computer architecture and for pioneering the application of integrated circuits for computer purposes and for serving as architect of the Texas Instruments scientific computer and for playing a leading role in many other computing developments in that company.


John Cocke

For contributions to high performance computer architecture through look ahead, parallelism and pipeline utilization, and to reduced instruction set computer architecture through the exploitation of hardware-software tradeoffs and compiler optimization.


Jack B. Dennis



Tom Kilburn



C. Gordon Bell



Wesley A. Clark



Maurice V. Wilkes



Robert S. Barton




2018 Eckert-Mauchly Subcommittee Chair

Kunle Olukotun (ACM Rep)
Next deadline for 2019 nominations: 30 March 2019
2018 Nominations are now closed.


ACM and IEEE Computer Society Honor Uri Weiser with 2016 Eckert-Mauchly Award

NEW YORK, NY & LOS ALAMITOS, Calif., May 18, 2016 – The Association for Computing Machinery (ACM) and IEEE Computer Society will jointly present the Eckert-Mauchly Award to Uri Weiser for leadership, as well as pioneering industry and academic work in high-performance processors and multimedia architectures. In a nearly 40-year career that has included roles in government, industry, and academia, Weiser has made seminal contributions, including defining the first Intel Pentium Processor architecture and being a recognized leader in asymmetric and heterogeneous manycore architecture.

In the late 1980s, Weiser was an engineer with Intel’s Design Architecture Group. At the time, Intel was using a Complex Instruction Set Computer (CISC) design for its X86 microprocessors. A debate emerged within the computing field as to whether Reduced Instruction Set Computer (RISC) design would eclipse the CISC design. Intel was contemplating whether to continue to manufacture its X86 processors using the CISC design or abandon the program and repurpose the company to design its microprocessors using RISC-based architecture.
Weiser single-handedly convinced Intel executives to continue with the CISC-based X86 processors by showing that through adding new features such as superscalar execution, branch predication, and more, the X86 processors could perform competitively against the RISC family of processors. Weiser’s architectural enhancements laid the foundation for the Intel Pentium Processor.

Weiser and his student Alex Peleg invented the Trace Cache, which increases performance and reduces power consumption by storing traces of instructions that have already been fetched and decoded. This innovation made a fundamental change to the design principles of high-performance microprocessors. A Trace Cache was incorporated into each of the over 500 million Intel Pentium 4 processors Intel has sold.

Shortly after enhancing Intel’s line of CISC-based processors, Weiser co-invented and led the MMX—a set of 64-bit Single Instruction Multiple Data (SIMD) instructions that increase the performance of digital signal processing, graphics processing, speech recognition, and video encoding/decoding.

In the early 2000s, Weiser began investigating improved power/performance architectures to speed up media applications. This research led Weiser to become a pioneer in the areas of heterogeneous computing (systems that use more than one kind of processor or core) and asymmetric computing (systems in which separate and unique code can run on both the parallel and general-purpose cores simultaneously).

Weiser is currently an emeritus professor in the Electrical Engineering department of the Technion ̶ srael Institute of Technology (IIT). He holds 13 patents and has authored over 50 publications. He was recognized with the Intel Achievement Award on two occasions. Additionally, he has been named an Intel Fellow, a Fellow of IEEE, and an ACM Fellow. Weiser is active on the advisory boards of numerous startups.

The Eckert-Mauchly Award is known as the computer architecture community’s most prestigious award. Weiser will receive the 2016 Eckert-Mauchly Award at the ACM/IEEE International Symposium on Computer Architecture (ISCA) to be held June 18-22 in Seoul, Korea.

ACM and IEEE Computer Society co-sponsor the Eckert-Mauchly Award, which was initiated in 1979. It recognizes contributions to computer and digital systems architecture and comes with a $5,000 prize. The award was named for John Presper Eckert and John William Mauchly, who collaborated on the design and construction of the Electronic Numerical Integrator and Computer (ENIAC), the pioneering large-scale electronic computing machine, which was completed in 1947.

About ACM 
ACM, the Association for Computing Machinery (www.acm.org), is the world’s largest educational and scientific computing society, uniting computing educators, researchers and professionals to inspire dialogue, share resources and address the field’s challenges. ACM strengthens the computing profession’s collective voice through strong leadership, promotion of the highest standards, and recognition of technical excellence. ACM supports the professional growth of its members by providing opportunities for life-long learning, career development, and professional networking.

About IEEE Computer Society 
IEEE Computer Society (www.computer.org) is one of the world’s leading computing membership organizations and a trusted information and career-development source for a global workforce of technology leaders including: professors, researchers, software engineers, IT professionals, employers, and students. IEEE Computer Society provides high-quality, state-of-the-art information on an on-demand basis. The Computer Society provides a wide range of forums for top minds to come together, including technical conferences, publications, a comprehensive digital library, unique training webinars, and professional training. IEEE is the world's largest professional association for advancement of technology and the Computer Society is the largest society within IEEE.

Media Contacts:

ACM: Jim Ormond, 212-626-0505, ormond@hq.acm.org

IEEE Computer Society: Katherine Mansfield, 714-816-2182, k.mansfield@computer.org


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