University of Texas at Austin Professor Yale Patt Wins First Rau Award

LOS ALAMITOS, Calif., Sept. 12, 2011 – Yale N. Patt, an electrical and computer engineering professor with the Cockrell School of Engineering at The University of Texas at Austin, has been selected as the first recipient of the inaugural IEEE Computer Society B. Ramakrishna Rau Award.
For more than four decades Patt has combined an active research program with consulting and teaching. He was recognized "for significant contributions and inspiring leadership in the microarchitecture community with respect to teaching, mentoring, research, and service."
The award, which comes with a $2,000 honorarium and a certificate, will be given out at the ACM/IEEE International Symposium on Microarchitecture (MICRO), set for 3-7 December in Porto Alegre, Brazil.
The IEEE Computer Society established the award in 2010 in memory of the late Bob Rau, a senior research scientist at HP Labs. The Rau Award recognizes significant accomplishments in the field of microarchitecture and compiler code generation.
"For Yale to receive the first Rau Award is an honor not only for Yale, but also for our Electrical and Computer Engineering Department here at The University of Texas at Austin," said Ahmed Tewfik, chair of the department. "Yale is one the top college educators in our nation in general, and computer engineering educators more specifically. He regularly teaches other university professors across the world how to present computer architecture to undergraduate and graduate students. Many of his innovations are embedded in the microprocessors that we all use in our laptops, tablets and smartphones. This award recognizes his many contributions over the years to research and education in computer engineering. "
In 1965, Patt introduced the WOS module, the first complex logic gate implemented on a single piece of silicon. In 1984, he and students Wen-mei Hwu, Steve Melvin, and Mike Shebanow introduced HPS, a high-performance microarchitecture that exploits instruction-level parallelism. Five years after that, he and student Tse-Yu Yeh introduced the Two-Level Branch Predictor, which provides much improved accuracy.
Patt's current research focuses on the potential challenges of 2018-era microprocessors, which are slated to contain more than 30 billion transistors. This includes breaking the abstraction layers that separate the problem statement in natural languages (like English) from the electronic circuits that actually execute the program. Among his projects is ACMP, a reconfigurable heterogeneous multicore microprocessor.
Patt is also working on improving the interface between the processor core and the DRAMs, on creating GPUs for non-graphics-processing, establishing effective prefetching in a multi-core environment, and making more effective use of the run-time system for performance.
Patt holds the Ernest Cockrell Jr. Centennial Chair in Engineering at The University of Texas at Austin. He earned his bachelor of science degree at Northeastern University and his master's degree and PhD at Stanford University, all in electrical engineering.
With former student Sanjay Patel, he co-authored the textbook, "Introduction to Computing Systems, From Bits and Gates to C and Beyond," now in its 2nd edition, with the 3rd edition in the works.
Patt was the recipient of the 1995 IEEE Emannuel R. Piore Medal "for contributions to computer architecture leading to commercially viable high-performance microprocessors," the 1996 IEEE Computer Society/ACM Eckert-Mauchly Award "for important contributions to instruction-level parallelism and superscalar processor design," the 1999 IEEE Computer Society W. Wallace McDowell Award for engineering and education contributions to the high-performance microprocessor industry, and the 2005 IEEE Charles Babbage Award.
Among his teaching commendations are the ACM Karl V. Karlstrom Outstanding Educator Award for 2000 and the 2002 Texas Excellence Teaching Award for the The University of Texas at Austin College of Engineering. Patt is a Fellow of both IEEE and ACM.
Rau was among the computer architecture professionals who Patt respected most. "Bob was one of the giants in our community who left us long before his time. Frankly, I did not expect I would be the first to get this award since I can think of at least two other people who are very deserving of it, including one who is my student. I can only say it is humbling to receive this award that bears his name," Patt said.
Rau, who passed away in 2002, managed HP Labs' Compiler and Architecture Research group. He started HP Labs' research program in Very Long Instruction Word (VLIW) and Instruction-Level Parallel (ILP) processing when he joined the facility in 1989, resulting in the development of the Explicitly Parallel Instruction Computing (EPIC) style of architecture that is the basis for the IA-64.
A co-founder of Cydrome Inc. which developed one of the first VLIW mini-supercomputers, Rau authored dozens of articles on VLIW computing, co-authored a book on ILP, and held 15 patents. He also taught at University of Illinois Urbana-Champaign.
He received his B.Tech degree from the Indian Institute of Technology in Madras, India, and his MS and PhD degrees from Stanford University, all in electrical engineering. He was also a recipient of the Eckert-Mauchly Award and a Fellow of both IEEE and ACM.

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