• IEEE.org
  • IEEE CS Standards
  • Career Center
  • About Us
  • Subscribe to Newsletter

0

IEEE
CS Logo
  • MEMBERSHIP
  • CONFERENCES
  • PUBLICATIONS
  • EDUCATION & CAREER
  • VOLUNTEER
  • ABOUT
  • Join Us
CS Logo

0

IEEE Computer Society Logo
Sign up for our newsletter
IEEE COMPUTER SOCIETY
About UsBoard of GovernorsNewslettersPress RoomIEEE Support CenterContact Us
COMPUTING RESOURCES
Career CenterCourses & CertificationsWebinarsPodcastsTech NewsMembership
BUSINESS SOLUTIONS
Corporate PartnershipsConference Sponsorships & ExhibitsAdvertisingRecruitingDigital Library Institutional Subscriptions
DIGITAL LIBRARY
MagazinesJournalsConference ProceedingsVideo LibraryLibrarian Resources
COMMUNITY RESOURCES
GovernanceConference OrganizersAuthorsChaptersCommunities
POLICIES
PrivacyAccessibility StatementIEEE Nondiscrimination PolicyIEEE Ethics ReportingXML Sitemap

Copyright 2025 IEEE - All rights reserved. A public charity, IEEE is the world’s largest technical professional organization dedicated to advancing technology for the benefit of humanity.

  • Home
  • /Publications
  • /Tech News
  • /Research
  • Home
  • / ...
  • /Tech News
  • /Research

Architectural Risk Assessment and System Performance More Tightly Linked Than Previously Thought

By Lori Cameron

By Lori Cameron on
August 3, 2018
Featured ImageFeatured ImageThe emergence of new chip technologies, memory technologies, and computing devices/paradigms requires new ways of assessing architectural risk. While risk assessment and management are typically treated as separate from issues of performance, they are more tightly linked than one might expect, say Weilong Cui and Timothy Sherwood, authors of "Architectural Risk" in the May/June 2018 issue of IEEE Micro. "Architectural risk, intuitively, is the degree to which the performance of a design is fragile in the face of unknowns. In many industrial settings, high-level architectural design decisions are made at the level of spreadsheets and other high-level analytical models or data points drawn from experience. Unlike in software, operating systems, and device modeling, most do not consider the uncertainty in the assumptions being made nor the fragility of the decisions with respect to those uncertainties. Here, we concentrate on such analytical models of architecture," they say.

Design highlights

Given a few data points, the authors first test whether a dataset can be transformed to normality through the Box-Cox test (a way to transform non-normal dependent variables into a normal, well-organized shape).

Below is a chart depicting front-end workflow for automatic risk quantification.

Below is a chart depicting back-end workflow for automatic risk quantification.

Below are core configurations of performance-optimal designs for LPHC (low parallelism and high communication overhead).

As application uncertainty grows, more asymmetric configurations are preferred, However, as architecture uncertainty grows, symmetric configurations are generally favored more.

These are just a few examples of the new concepts and tools the authors propose for dealing quantitatively with uncertainty at early design cycles. "The goal of this new line of work is to promote a new first-order design concern (architectural risk) and to provide a systematic framework to quantify such risks, with the aim of helping find designs that are more robust to the impacts of uncertainty than performance-only optimal designs while still maintaining very strong performance in the common case," the authors say. Research related to computer architecture and risk management in the Computer Society Digital Library:
  • On Risk
  • Architectural Simulators Considered Harmful
  • Architectural Analysis for Security
  • Mitigating Risk with Cyberinsurance
  • Architectural Support for Cognitive Processing
  • Operational: The Forgotten Architectural View
  • Architectural Approaches to Security: Four Case Studies

About Lori Cameron Lori Cameron is a Senior Writer for the IEEE Computer Society and currently writes regular features for Computer magazine, Computing Edge, and the Computing Now and Magazine Roundup websites. Contact her at l.cameron@computer.org. Follow her on LinkedIn.
LATEST NEWS
Reimagining Infrastructure and Systems for Scientific Discovery and AI Collaboration
Reimagining Infrastructure and Systems for Scientific Discovery and AI Collaboration
IEEE 2881: Learning Metadata Terms (LMT) Empowers Learning in the AI Age
IEEE 2881: Learning Metadata Terms (LMT) Empowers Learning in the AI Age
Platform Engineering: Bridging the Developer Experience Gap in Enterprise Software Development
Platform Engineering: Bridging the Developer Experience Gap in Enterprise Software Development
IEEE Std 3158.1-2025 — Verifying Trust in Data Sharing: Standard for Testing and Performance of a Trusted Data Matrix System
IEEE Std 3158.1-2025 — Verifying Trust in Data Sharing: Standard for Testing and Performance of a Trusted Data Matrix System
IEEE Std 3220.01-2025: Standard for Consensus Framework for Blockchain System
IEEE Std 3220.01-2025: Standard for Consensus Framework for Blockchain System
Read Next

Reimagining Infrastructure and Systems for Scientific Discovery and AI Collaboration

IEEE 2881: Learning Metadata Terms (LMT) Empowers Learning in the AI Age

Platform Engineering: Bridging the Developer Experience Gap in Enterprise Software Development

IEEE Std 3158.1-2025 — Verifying Trust in Data Sharing: Standard for Testing and Performance of a Trusted Data Matrix System

IEEE Std 3220.01-2025: Standard for Consensus Framework for Blockchain System

Mapping the $85B AI Processor Landscape: Global Startup Surge, Market Consolidation Coming?

AI Agentic Mesh – A Foundational Architecture for Enterprise Autonomy

IEEE O.C A.I “DEVHACK” Hackathon 2025 Winner Celebration

FacebookTwitterLinkedInInstagramYoutube
Get the latest news and technology trends for computing professionals with ComputingEdge
Sign up for our newsletter