Championing Sustainable Technology: A Conversation with Prof. Dr. Luca Benini, 2023 Edward J. McCluskey Award Winner

IEEE Computer Society Team
Published 06/14/2023
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We are thrilled to showcase an exclusive interview with Prof. Dr. Luca Benini, the distinguished recipient of the prestigious IEEE 2023 Edward J. McCluskey Award. Renowned for his groundbreaking contributions to energy-efficient chip designs, such as ORIGAMI, YodaNN, and HWCE, Prof. Dr. Luca Benini has undeniably revolutionized sustainable technology.

In this captivating discussion, we delve into his motivations, the impact of his Parallel Ultra-Low-Power (PULP) architecture, and his remarkable achievements in the field of energy-efficient design methods.

Learn more about Benini as he shares invaluable insights into his remarkable journey below.


ORIGAMI, YodaNN, and HWCE have made a significant impact on sustainable technology. Were you surprised by how well the community has adapted to these new designs?

Let’s say that I was hoping for this to happen. In fact, we heavily invested in an open-source hardware approach, where the register-transfer level (RTL) description (in SystemVerilog) of our designs are open-sourced under a liberal licenses (Apache-style) to enable companies and academic researchers alike to reuse our designs as templates, extend them, and of course cross-benchmark them.

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What’s the most exciting project that you’ve seen you’ve seen your development, the Parallel Ultra-Low-Power (PULP) architecture, implemented on?

I am excited about the majority of them, but probably the most exciting project has been the RISC-V Vega IoT processor implemented in 22nm FDX technology from Globalfoundries. This SoC was designed based on our open-source PULP processors and accelerators in tight collaboration with the startup Greenwaves technologies. What made this project very exciting for me is that not only was it a success from the scientific viewpoint (the paper was published at the International Solid-State Circuits Conference 2021), but it also immediately led to a successful product developed by Greenwaves. This demonstrated concretely that the open-source collaboration model works and speeds up the path to innovation.


What kept you motivated, throughout your career, while working in such a challenging field, like energy-efficient design methods?

What kept me motivated was the fact that energy efficient design has not gone out of fashion and has not become a consolidated field, with only incremental innovation. The challenge keeps rising, and we need to be more and more inventive, working across levels of abstraction.

For instance, we need to look for energy-efficient algorithms, but at the same time, exploit the key innovation that comes from devices and technology (e.g. three-dimensional integration). Playing across abstraction layers is hard, but it is a lot of fun, as you can always find a way to change the rules of the game and keep pushing the efficiency bar higher.


What has been the most rewarding aspect of your work?

Building a large, very cohesive, and inclusive group while being able to engage in projects that are usually only doable within major companies (e.g. We are now designing multi-billion transistor chiplets and systems in package). It’s not only science and research, it’s also building strong and lasting relationships with many colleagues and collaborators. This is extremely rewarding for me!


More About Prof. Dr. Luca Benini

Prof. Dr. Luca Benini holds the chair of digital Circuits and systems at ETHZ and is Full Professor at the Universita di Bologna. He received a PhD from Stanford University. He has been visiting professor at Stanford University, IMEC, EPFL. He has worked in Synopsys, Hewlett-Packard Labs and he served as chief architect in STmicroelectronics France. Prof. Dr.Benini’s research interests are in energy-​efficient parallel computing systems, smart sensing micro-​systems and machine learning hardware. Prof. Dr.Benini is the leader of the PULP (parallel-ultra-low power) open source hardware platform based on the RISC-V ISA. In his early career, he made pioneering contributions to the fields of Networks-on-Chip, and design automation for low power digital circuits and systems. He has published more than 1000 peer-​reviewed papers and five books. He is a Fellow of the IEEE, of the ACM and a member of the Academia Europaea. He is the recipient of the 2016 IEEE CAS Mac Van Valkenburg award, the 2020 EDAA achievement Award and the 2020 ACM/IEEE A. Richard Newton Award.