Norman P. Jouppi is a Distinguished Hardware Engineer at Google. He is known for his innovations in computer memory systems, including stream prefetch buffers, victim caching, multi-level exclusive caching, and development of the CACTI tool for modeling memory timing, area, and power. He has been the principal architect and lead designer of several microprocessors, contributed to the architecture and design of graphics accelerators, and extensively researched video, audio, and physical telepresence. His innovations in microprocessor design have been adopted in many high-performance microprocessors. His recent research has investigated the impact of emerging technologies such as non-volatile memory and nanophotonics on computer systems.
Jouppi received his Ph.D. in electrical engineering from Stanford University in 1984, and a master of science in electrical engineering from Northwestern University in 1980. While at Stanford, he was one of the principal architects and designers of the MIPS microprocessor, and developed techniques for MOS VLSI timing verification. He joined HP in 2002 through its merger with Compaq, where he was a Staff Fellow at Compaq’s Western Research Laboratory (formerly DECWRL) in Palo Alto, California. In 2010, he was named an HP Senior Fellow. From 1984 through 1996 he was a consulting assistant/associate professor in the electrical engineering department at Stanford University where he taught courses in computer architecture, VLSI, and circuit design.
He currently serves on the research highlights editorial board of Communications of the ACM. Norm holds more than 75 U.S. patents, with one Compaq Key Patent award. He has published over 125 technical papers, with several best paper awards and two International Symposium on Computer Architecture (ISCA) Influential Paper Awards. In 2013, he received the ACM SIGARCH Distinguished Service Award. He is a Fellow of the ACM and the IEEE, and a member of the National Academy of Engineering.