Submission Deadline: 28 July 2025
Publication: January-February 2026
Silent data corruption (SDC) has been a long-known effect of defects in silicon: a defect impacts the result of a computation, but no hardware or software mechanism has been provided or was able to detect it – the computing system is fully operational, and no exception was raised, nothing unexpected was logged. This definition of SDC itself points to something extremely rare. Given the engineering effort and the hardware and software resources that the computing industry puts during design, manufacturing, and operational time to minimize the impact of silicon defects, it has always been a common belief that silicon chips either work correctly or malfunction for good and need to be replaced – an SDC was never an option.
To everyone’s surprise operators of large-scale systems (cloud computing datacenters) – bravely for some or selfishly for others – openly reported an unimaginable number of detected CPUs, GPUs, and AI Accelerator (AIA) chips in the vicinity of one on a thousand. The erroneous result may affect subsequent computations of the same or other programs still silently for hours, weeks, or forever in the same machine or a large cluster of machines used for cloud workloads or machine learning training and inference workloads. The reports mobilized the industry and the academia towards understanding the problem and providing solutions.
This Special Issue of the IEEE Micro Magazine is dedicated to “Silent Data Corruptions” and aims to gather the significant computing community efforts in tackling this very important problem and to capture a snapshot of the progress till the initial disclosures. The focus of the Special Issue on “Silent Data Corruptions” is on defective computing chips (CPUs, GPUs, AIAs) deployed at large scale, and particularly defects that are likely to produce silently corrupted data and program results as opposed to other types of behaviors that are more easily detected and observed.
The Special Issue will provide answers to the following (non-exclusive list of) questions:
- How severe is the problem of SDCs?
- Which types of computing chips (CPUs, GPUs, AIAs, all) are more likely to produce SDCs?
- What is an SDC at different domains (cloud, HPC, AI training/inference)?
- Which workload types are more likely to produce SDCs?
- Are new types of silicon defects or known ones responsible for SDCs?
- What kind of design, microarchitectural, architectural techniques can reduce SDCs?
- What kind of compilation and system software techniques can reduce SDCs?
- At which level of abstraction is SDC mitigation more cost-effective?
- What do CPU, GPU, AIA vendors do to mitigate SDCs?
- What do foundries and the EDA industry do to mitigate SDCs?
- What do hyperscalers do to minimize SDCs likelihood in customer workloads?
Submission Guidelines
For author information and guidelines on submission criteria, please visit the Author Information page. Please submit papers through the Author Portal, and be sure to select the special-issue name (“Silent Data Corruptions”). Manuscripts should not be published or currently submitted for publication elsewhere. Please submit only full papers intended for review, not abstracts, to the Author Portal.
In addition to submitting your paper to IEEE Micro, you are also encouraged to upload the data related to your paper to IEEE DataPort. IEEE DataPort is IEEE’s data platform that supports the storage and publishing of datasets while also providing access to thousands of research datasets. Uploading your dataset to IEEE DataPort will strengthen your paper and will support research reproducibility. Your paper and the dataset can be linked, providing a good opportunity for you to increase the number of citations you receive. Data can be uploaded to IEEE DataPort prior to submitting your paper or concurrent with the paper submission. Thank you!
Guest Editor
Dimitris Gizopoulos, University of Athens, Greece
Contact Guest Editor at dgizop@di.uoa.gr or the Editor-in-Chief, Hsien-Hsin Sean Lee at lee.sean@gmail.com.
