CLOSED: Call for Papers: Special Issue on Near / In-Memory Processing
IEEE Transactions on Computers seeks submissions for this upcoming special section.
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Submissions Due: 21 February 2023
Submission Deadline: 21 February 2023
Major Revisions Due: 1 June 2023
Notification of Final Acceptance: 15 July 2023
Final Manuscripts Due: 15 August 2023
• Publication: 1 October 2023
Many interacting computing technology trends call for a change in computer architectures to meet the demands of emerging applications. First, Moore’s Law, which has provided an exponential performance growth through decades, is losing steam. Second, the application landscape of computing is shifting from being compute- to becoming data-intensive. Data intensive applications, e.g., machine learning, graph processing and in-memory database processing impose an increased burden on the classical separation of compute and memory popularly called the von Neumann bottleneck. Fortunately, emerging memory technologies have made it timely to reconsider processing near-memory or in-memory, pioneered already in the 1960s. With the advent of 3D stacked memory, it is possible to implement compute engines or accelerators on a logic die tightly coupled with several layers of memory – near-memory processing. The research community is also considering embedding processing support into the memory arrays in conventional DRAM technology as well as in emerging memory technologies, such as resistive memory – in-memory processing.
This special issue aims at taking a snapshot of ongoing developments in near- and in-memory processing. Challenges are enormous and cut across all compute layers and calls for co-design of circuit-level techniques via system architecture to the software stack. The scope of the special issue is including all these topics and include, among others, the following
Near/in-memory architecture models
Near/in-memory acceleration of data intensive applications
Emerging memory technologies for near/in-memory processing
System integration of conventional and near/in-memory components
System support for near/in-memory processing systems
Programming models and software implications of near/in-memory processing systems
Evaluation of industry/academic near/in-memory systems
Security, dependability, power/energy and performance implications of near/in-memory processing systems
Mapping of emerging killer applications on near/in-memory processing systems
For author information and guidelines on submission criteria, please visit the IEEE TC’s Author Information page. Please submit papers through the ScholarOne system, and be sure to select the special issue name. Manuscripts should not be published or currently submitted for publication elsewhere. Please submit only full papers intended for review, not abstracts, to the ScholarOne portal.