• IEEE.org
  • IEEE CS Standards
  • Career Center
  • About Us
  • Subscribe to Newsletter

0

IEEE-CS_LogoTM-orange
  • MEMBERSHIP
  • CONFERENCES
  • PUBLICATIONS
  • EDUCATION & CAREER
  • VOLUNTEER
  • ABOUT
  • Join Us
IEEE-CS_LogoTM-orange

0

IEEE Computer Society Logo
Sign up for our newsletter
IEEE COMPUTER SOCIETY
About UsBoard of GovernorsNewslettersPress RoomIEEE Support CenterContact Us
COMPUTING RESOURCES
Career CenterCourses & CertificationsWebinarsPodcastsTech NewsMembership
BUSINESS SOLUTIONS
Corporate PartnershipsConference Sponsorships & ExhibitsAdvertisingRecruitingDigital Library Institutional Subscriptions
DIGITAL LIBRARY
MagazinesJournalsConference ProceedingsVideo LibraryLibrarian Resources
COMMUNITY RESOURCES
GovernanceConference OrganizersAuthorsChaptersCommunities
POLICIES
PrivacyAccessibility StatementIEEE Nondiscrimination PolicyIEEE Ethics ReportingXML Sitemap

Copyright 2026 IEEE - All rights reserved. A public charity, IEEE is the world’s largest technical professional organization dedicated to advancing technology for the benefit of humanity.

  • Home
  • /Profiles
  • Home
  • /Profiles

Uzi Vishkin

Award Recipient

Featured Image

Uzi Vishkin started his work on parallel computing in 1979 as he began his doctoral research. Conjecturing then that transition to parallelism may turn into the only paradigm shift in core computing during his professional lifetime, Vishkin strategized his research career around three quests. Faced with what he considered a build-first-figure-out-how-to-program-later approach from the computer systems side and the dominance of NC (polynomial number of processors and polylogarithmic time) complexity theory, Vishkin went against the grain. His first quest was to crystalize the notion of parallel algorithmic thinking (i) to enable later system specification, (ii) yet challenge prominent theorists by favoring parallel algorithms whose total number of operations is as close as possible to that of the serial algorithms they seek to speed up. Parallel algorithms textbooks and survey adopted his work-depth (WD) methodology and incorporated tens of the PRAM algorithm he and colleagues invented, including: symmetry breaking techniques including , coin tossing (applied also in distributed computing), integer sorting (precursor to map-reduce) finding lowest comment ancestors, Euler tour technique, parallel graph algorithms for connectivity and  biconnectivity, original string matching techniques: witnesses and deterministic sampling, and 2-3 trees, and introduced their fit into an elegant structure---unusual for combinatorics or algorithms—including more advanced algorithms such as triconnectivity and maxflow.

His second quest was to invent the PRAM-On-Chip XMT architecture, have it prototyped including commitment to silicon and demonstration that as-is WD algorithms can be automatically implemented to achieve competitive results, refuting a broad presumption that PRAM is unrealistic. His 2005 hybrid memory for serial and parallel computing has been a precursor to CPU-integrated parallel accelerators, such as GPUs, in Billions of devices such as PCs and laptops since the early 2010s. The XMT ease of programming was demonstrated by over 1000 students in a single high school. His third, and current, quest is R&D of “killer apps” for the approach.

Education, appointments and honors B.Sc. and M.Sc. in Mathematics, Hebrew University. D.Sc., Computer Science, Technion, 1981. Post-doc, IBM Thomas J. Watson Research Center.1982 to 1984: department of computer science at New York University; remained affiliated till 1988. 1984 to 1997: Professor of computer science, Tel Aviv University. 1987 to 1988: CS Chair. 1988 and on: Professor of Electrical and Computer Engineering and permanent member of the University of Maryland Institute for Advanced Computer Studies (UMIACS). He is ACM Fellow for, among other things, having “played a leading role in forming and shaping what thinking in parallel has come to mean in the fundamental theory of Computer Science”. He was also an ISI-Thompson Highly Cited Researcher, is Fellow of the National Academy of Inventors (NAI), and winner of the ACM-SPAA Parallel Computing Award.

Awards

2026 IEEE CS Charles Babbage Award
“For seminal contributions to the theory of PRAM computing, and for inventing numerous work-efficient parallel algorithms.”
Learn more about the Charles Babbage Award

LATEST NEWS
Connecting Enterprise Software Architecture, Research, and Community: A Conversation with Siva Rama Krishna Varma Bayyavarapu
Connecting Enterprise Software Architecture, Research, and Community: A Conversation with Siva Rama Krishna Varma Bayyavarapu
Episode 9 | The Identity Crisis of Autonomous Agents
Episode 9 | The Identity Crisis of Autonomous Agents
How IaC Turns Infrastructure Into a Competitive Advantage—Q&A With Srilakshmi Bharadwaj
How IaC Turns Infrastructure Into a Competitive Advantage—Q&A With Srilakshmi Bharadwaj
Performance Reviews: Three Tips for Proving Your Expertise
Performance Reviews: Three Tips for Proving Your Expertise
The Past and Future of IEEE Transactions on Services Computing: A Retrospective
The Past and Future of IEEE Transactions on Services Computing: A Retrospective
Read Next

Connecting Enterprise Software Architecture, Research, and Community: A Conversation with Siva Rama Krishna Varma Bayyavarapu

Episode 9 | The Identity Crisis of Autonomous Agents

How IaC Turns Infrastructure Into a Competitive Advantage—Q&A With Srilakshmi Bharadwaj

Performance Reviews: Three Tips for Proving Your Expertise

The Past and Future of IEEE Transactions on Services Computing: A Retrospective

AI Doesn’t Break Where You Think: The Hidden System Failures Behind Modern AI

Code Faster Today … Fail Faster Tomorrow?

A Legacy of Insight, A Future of Impact in Computer Graphics and Applications

Get the latest news and technology trends for computing professionals with ComputingEdge
Sign up for our newsletter