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Lawrence Widdoes

Award Recipient

Featured ImageFeatured ImageLawrence Curtis Widdoes, Jr. was born in St. Louis, Missouri on 19 January 1952. He received his B.S. in Engineering and Applied Science from the California Institute of Technology in June, 1973 and his Ph.D. in Computer Science in December 1980 from Stanford University, where he won the 1981 Fannie and John Hertz award for the best Ph.D. thesis. While working on his Ph.D. at Stanford, he also held a Fannie and John Hertz Foundation fellowship. Among his other academic honors at Caltech were the Joseph MacPherson Prize in Engineering, in 1973, the Jack E. Froelich Memorial Award and the Honeywell Award in 1972, and a Sloan scholarship, 1969–1973. As an undergraduate, Dr. Widdoes worked on pre-launch ground-support software at the Space Radiation Laboratory, and on the REL Language System, in the REL Project at the California Institute of Technology. Later at Stanford, before he collaborated with Dr. McWilliams on the S-1 Project, he worked at the Digital Systems Laboratory on the Minerva Project, a multi-microprocessor research computer, which he designed and implemented. In November of 1975, he and McWilliams founded the S-1 Project at Lawrence Livermore National Laboratory, and between October, 1978 and July, 1980, they shared the technical directorship of that project. Between 1978 and 1980 Dr. Widdoes also services as Assistant Professor in Residence in the Computer Science Department at the University of California at Berkeley where he taught courses in advanced computer design and conducted and supervised research in that area. Then, in order to devote himself fully to the SCALD project, he resigned both positions and took over full responsibility for the S-1 SCALD group. In March 1981, Dr. Widdoes left the S-1 Project and founded Valid Logic Systems, Inc. becoming Vice President of Engineering. Since March 1983, Dr. Widdoes serves as Vice President and Chief Scientist of his company, where he is concentrating his efforts in the area of advanced simulation techniques for very complex VLSI customer chips. He has fled four patent applications on this most recent work.
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