Call for Papers: Special Issue on GenAI in the Age of Chiplets

IEEE Micro seeks submissions for this upcoming special issue.

Submissions Due: 2 August 2026

Publication: Jan/Feb 2027

Artificial Intelligence (AI) and Machine Learning (ML) have rapidly become foundational technologies driving innovation across science, industry, and society. Most recently, generative AI (including large language models, diffusion models, multimodal foundation models, and agentic systems enabled by generative models) has reshaped expectations for automation, creativity, and productivity. At the same time, the unprecedented scale, data movement, and energy demands of these models are straining traditional monolithic hardware designs and motivating a fundamental rethinking of system architectures.

Chiplet-based design has emerged as a compelling response to these challenges. By enabling 2.5D/3D heterogeneous integration, fine-grained technology scaling, and flexible composition of compute, memory, interconnect, and accelerators, chiplets offer a promising path toward scalable, cost-effective, and energy-efficient systems for generative AI. However, fully realizing this potential requires coordinated advances across the hardware–software stack, spanning architecture, packaging, interconnects, compilers, system software, and design methodologies.

This IEEE Micro Special Issue aims to bring together industrial practitioners and academic researchers to present visionary ideas, practical insights, and real-world experiences at the intersection of generative AI and chiplet-based systems. The issue will highlight key challenges, emerging solutions, and future directions for designing, building, and deploying GenAI platforms in the age of chiplets. We invite original contributions covering system-level, architectural, and microarchitectural aspects of generative AI platforms enabled by chiplets. Topics of interest include, but are not limited to:

  • Chiplet Architectures for GenAI: 2.5D/3D chiplet architectures; wafer-scale systems; advanced packaging; heterogeneous and optical integration techniques for scalable GenAI.
  • Interconnects and Memory Systems: High-bandwidth, low-latency interconnects; chiplet-to-chiplet and die-to-die communication; memory hierarchies and disaggregated memory for large model training and inference.
  • Accelerators and Microarchitecture: Domain-specific accelerators and microarchitectural support for LLMs, multimodal models, training, fine-tuning, and inference.
  • Hardware–Software Co-Design: Co-optimization of models, algorithms, hardware, and packaging; cross-layer design strategies for GenAI workloads; end-to-end full-stack AI solutions.
  • Programming Models, Compilers, and Systems Software: Software stacks, compilers, runtime systems, and orchestration for large-scale deployment of generative AI on chiplet-based platforms.
  • Reliability, Security, and Safety: Fault tolerance, reliability, and yield in chiplet systems; security, privacy, and robustness against adversarial threats in GenAI architectures.
  • Energy Efficiency and Sustainability: Power- and energy-efficient architectures; thermal management; sustainability considerations for data center and mobile GenAI systems.
  • AI for System Design: AI/ML techniques for fast system modeling, architecture exploration, design automation, and optimization of chiplet-based systems.
  • Deployment Experiences and Case Studies: Lessons learned from commercially deployed GenAI systems, production chiplet platforms, and real-world workloads.

Submission Guidelines

For author information and guidelines on submission criteria, please visit the Author Information Page. Please submit papers through the IEEE Author Portal, and be sure to select the special-issue name. Manuscripts should not be published or currently submitted for publication elsewhere. Please submit only full papers intended for review, not abstracts, to the IEEE Author Portal.

In addition to submitting your paper to IEEE Micro, you are also encouraged to upload the data related to your paper to IEEE DataPort. IEEE DataPort is IEEE's data platform that supports the storage and publishing of datasets while also providing access to thousands of research datasets. Uploading your dataset to IEEE DataPort will strengthen your paper and will support research reproducibility. Your paper and the dataset can be linked, providing a good opportunity for you to increase the number of citations you receive. Data can be uploaded to IEEE DataPort prior to submitting your paper or concurrent with the paper submission. Thank you!

Contact Guest Editors at:

Or the Editor-in-Chief Hsien-Hsin Sean Lee.

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