About
IEEE Computer Architecture Letters
IEEE Computer Architecture Letters is a rigorously peer-reviewed forum for publishing early, high-impact results in the areas of uni- and multiprocessor computer systems, computer architecture, microarchitecture, workload characterization, performance evaluation and simulation techniques, and power-aware computing.
Scope of Interest
Submissions are welcomed on any topic in computer architecture, especially but not limited to: microprocessor and multiprocessor systems, microarchitecture and ILP processors, workload characterization, performance evaluation and simulation techniques, compiler-hardware and operating system-hardware interactions, interconnect architectures, memory and cache systems, power and thermal issues at the architecture level, I/O architectures and techniques, independent validation of previously published results, analysis of unsuccessful techniques, domain-specific processor architectures (e.g., embedded, graphics, network, etc.), real-time and high-availability architectures, reconfigurable systems.
Submissions are welcomed on any topic in computer architecture, especially but not limited to:
- microprocessor and multiprocessor systems
- microarchitecture and ILP processors
- workload characterization
- performance evaluation and simulation techniques
- compiler-hardware and operating system-hardware interactions
- interconnect architectures
- memory and cache systems
- power and thermal issues at the architecture level
- I/O architectures and techniques
- independent validation of previously published results
- analysis of unsuccessful techniques
- domain-specific processor architectures (e.g., embedded, graphics, network, etc.)
- real-time and high-availability architectures
- reconfigurable systems
Submission Instructions:
This journal is a hybrid publication, allowing either traditional manuscript submission or author-paid Open Access (OA) manuscript submission.
Read about OA submissions here.
Please use the
IEEE Template Selector to find the correct template. Submitted letters must be four pages or fewer, including all figures, tables, and references. Submissions exceeding this length will be returned without review.
Templates are provided to assist you with formatting your submission and complying with the page limit; however, variances can occur during final layout if adjustments are needed to images, spacing, or other requirements. In this case, the production team will work with you to make any necessary modifications.
In 2023, changes were made to
CAL’s article layout style and a small number of articles that had been submitted in the earlier template exceeded the four page limit. As a courtesy to authors for factors beyond their control, these additional pages have been permitted. Authors submitting now will utilize the correct template, so please note that additional pages will not be granted.
In addition to submitting your paper to
CAL, you are also encouraged to upload the data related to your paper to
IEEE DataPort. IEEE DataPort is IEEE's data platform that supports the storage and publishing of datasets while also providing access to thousands of research datasets. Uploading your dataset to IEEE DataPort will strengthen your paper and will support research reproducibility. Your paper and the dataset can be linked, providing a good opportunity for you to increase the number of citations you receive. Data can be uploaded to IEEE DataPort prior to submitting your paper or concurrent with the paper submission. Thank you!
For author information and guidelines on submission criteria, please visit IEEE Computer Architecture Letters Information page.
Questions?
Contact: Editorial board and
staff
