Board of Governors (2012-2014)
Hironori Kasahara has served as a chair of the IEEE Computer Society Japan Chapter, a board member of the IEEE Tokyo Section, a member of the IEEE Japan Council Long-Term Strategy Committee, and as publication chair or program committee of nine IEEE conferences, including the International Conference on Parallel and Distributed Systems and Supercomputing. He has chaired the Information Processing Society of Japan (IPSJ) SIG on Computer Architecture, served on the IPSJ Journal editorial board as head of the hardware working group, and served as vice program chair of the ENIAC 50th anniversary celebration at ICS.
In 1985, Kasahara received a PhD in electrical engineering from Waseda University, Tokyo, where he has been a professor of computer science since 1997, and a director of the Advanced Chip Multiprocessor Research Institute. Kasahara was a visiting scholar at the University of California, Berkeley and the University of Illinois at Urbana-Champaign's Center for Supercomputing Research & Development. Kasahara received the Young Author Prize at the International Federation of Automatic Control World Congress, an IPSJ Sakai Memorial Special Research Award, and a Semiconductor Technology Academic Research Center Industry-Academia Cooperative Research Award. He led Japanese national projects on parallelizing compilers and multicores in METI/NEDO.
Learn more about Dr. Kasahara's projects here.