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Issue No.03 - May/June (vol.28)
ISSN: 0740-7475
TABLE OF CONTENTS
Transaction-Level Validation of Multicore Architectures
Samar Abdi , Concordia University
Yonghyun Hwang , Qualcomm
Lochi Yu , Universidad de Costa Rica
Gunar Schirner , Northeastern University
Daniel D. Gajski , University of California, Irvine
pp. 10-19
Frédéric Pétrot , Grenoble Institute of Technology
Patrice Gerin , Kalray
Marius Gligor , Grenoble Institute of Technology
Mian-Muhammed Hamayun , Grenoble Institute of Technology
Hao Shen , Grenoble Institute of Technology
pp. 32-43
Perspectives
Zeljko Zilic , McGill University
Prabhat Mishra , University of Florida
Sandeep Shukla , Virginia Tech
pp. 52-53
Fault Tolerance Through Selective Hardening
Ilia Polian , University of Passau
John P. Hayes , University of Michigan, Ann Arbor
pp. 54-63
Postproduction Performance Calibration
Nathan Kupp , Yale University
He Huang , Yale University
Yiorgos Makris , Yale University,
Petros Drineas , Rensselaer Polytechnic Institute
pp. 64-75
Standards
Stan Krolikoski , Cadence Design Systems
pp. 76-79
Book Reviews
Conference Reports
Panel Summaries
The Road Ahead
Andrew B. Kahng , University of California, San Diego
pp. 86-89
CEDA Currents
TTTC Newsletter
pp. 92-93
DATC Newsletter
The Last Byte
Sandeep Shukla , Virginia Tech
Prabhat Mishra , University of Florida
Zeljko Zilic , McGill University
pp. 96
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