Yuan Xie
Pennsylvania State University
354E IST Building
University Park, PA, 16802
Phone:  814-8657496   
Fax: 814-865-3176
Email:   yuanxie@cse.psu.edu

DVP term expires December 2013

Yuan Xie received the B.S. degree in electronic engineering from Tsinghua University, Beijing, in 1997, and the M.S. and Ph.D. degrees in electrical engineering from Princeton University in 1999 and 2002, respectively. He is currently Associate Professor in Computer Science and Engineering department at the Pennsylvania State University. Before joining Penn State in Fall 2003, he was with IBM Microelectronic Division's Worldwide Design Center. Prof. Xie is a recipient of the National Science Foundation Early Faculty (CAREER) award, the SRC Inventor Recognition Award, IBM Faculty Award, and several Best Paper Award and Best Paper Award Nominations at IEEE/ACM conferences. He has published more than 100 research papers in journals and refereed conference proceedings, in the area of EDA, computer architecture, VLSI circuit designs, and embedded systems. His current research projects include: three-dimensional integrated circuits (3D ICs) design, EDA, and architecture; emerging memory technologies; low power and thermal-aware design; reliable circuits and architectures; and embedded system synthesis. He is currently Associate Editor for ACM Journal of Emerging Technologies in Computing Systems (JETC), IEEE Transactions on Very Large Scale Integration Systems (TVLSI), IEEE Transactions on Computer Aided Design of Integrated Circuits (TCAD), IEEE Design and Test of Computers, IET Computers and Digital Techniques (IET CDT).

Architectural Modeling and Design with Emerging Non-volatile Memories
Emerging memory technologies, such as Phase-Change RAM (PCRAM) and Magnetic RAM (MRAM), have the potential to revolutionize modern computer system designs. By combing the speed of SRAM, the density of DRAM, and the non-volatility of Flash memory, these emerging memory technologies demonstrated a great potential to be the candidates for future memory hierarchy design. As such emerging memory technologies are getting mature, many questions are raised for better utilizing them to improve the performance/power/reliability of future computing systems. For example, how to model such emerging memory technologies? What will be the impacts on the future memory hierarchy? What are the research challenges to overcome for such a new memory hierarchy? What will be the novel applications/architectures with emerging memory technologies? This talk will present ongoing work that tries to answer those questions. First, the speaker will provide an overview of architectural modeling techniques for emerging memory technologies. Next, the speaker will describe novel architectural techniques that exploit these new memory technologies in computer memory hierarchies. Finally, novel applications that leverages the unique benefits of these emerging memory technologies will be presented.

Design and Architecture for 3D Integrated Circuits
3D Integration emerges as an attractive option to sustain Moore's law as well as to enable More-than-Moore. This talk will present an overview of recent research progress in 3D IC designs, including both design tools perspective and architecture design perspective. It will also emphasize the following research directions for future 3D IC design: Design automation and test techniques and methodologies for 3D designs are imperative to realize 3D integration; Novel architectures and design space exploration at the architectural level are also essential to leverage 3D integration technologies for performance gain; Possible "killer" application for 3D integration (e.g., what application could dramatically benefit from 3D stacking technology or what novel applications are enabled by 3D technology.)