The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field. It publishes papers, brief contributions, and comments on research in areas of current interest to the readers. These areas include, but are not limited to, the following: a) computer organizations and architectures; b) operating systems, software systems, and communication protocols; c) real-time systems and embedded systems; d) digital devices, computer components, and interconnection networks; e) specification, design, prototyping, and testing methods and tools; f) performance, fault tolerance, reliability, security, and testability; g) case studies and experimental and theoretical evaluations; and h) new and important applications and trends.
Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels.
IEEE Computer Architecture Letters is a quarterly forum for fast publication of new, high-quality ideas in the form of short, critically refereed, technical papers.
Submissions are accepted on a continuing basis, and accepted letters will be published immediately in the IEEE Digital Library and in the next available print issue. Members of the Technical Committee on Computer Architecture will receive the print issue as a benefit of being a member. Authors should submit their manuscript through Manuscript Central.
Submissions are welcomed on any topic in computer architecture, especially but not limited to:
- Microprocessor and multiprocessor systems
- Microarchitecture and ILP processors
- Workload characterization
- Performance evaluation and simulation techniques
- Compiler-hardware and operating system-hardware interactions
- Interconnect architectures
- Memory and cache systems
- Power and thermal issues at the architecture level
- I/O architectures and techniques
- Independent validation of previously published results
- Analysis of unsuccessful techniques
- Domain-specific processor architecture (embedded, graphics, network, etc.)