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Computing Now Exclusive Content — May 2011

News Archive

July 2012

Gig.U Project Aims for an Ultrafast US Internet

June 2012

Bringing Location and Navigation Technology Indoors

May 2012

Plans Under Way for Roaming between Cellular and Wi-Fi Networks

Encryption System Flaw Threatens Internet Security

April 2012

For Business Intelligence, the Trend Is Location, Location, Location

Corpus Linguistics Keep Up-to-Date with Language

March 2012

Are Tomorrow's Firewalls Finally Here Today?

February 2012

Spatial Humanities Brings History to Life

December 2011

Could Hackers Take Your Car for a Ride?

November 2011

What to Do about Supercookies?

October 2011

Lights, Camera, Virtual Moviemaking

September 2011

Revolutionizing Wall Street with News Analytics

August 2011

Growing Network-Encryption Use Puts Systems at Risk

New Project Could Promote Semantic Web

July 2011

FBI Employs New Botnet Eradication Tactics

Google and Twitter "Like" Social Indexing

June 2011

Computing Commodities Market in the Cloud

May 2011

Intel Chips Step up to 3D

Apple Programming Error Raises Privacy Concerns

Thunderbolt Promises Lightning Speed

April 2011

Industrial Control Systems Face More Security Challenges

Microsoft Effort Takes Down Massive Botnet

March 2011

IP Addresses Getting Security Upgrade

February 2011

Studios Agree on DRM Infrastructure

January 2011

New Web Protocol Promises to Reduce Browser Latency

To Be or NAT to Be?

December 2010

Intel Gets inside the Helmet

Tuning Body-to-Body Networks with RF Modeling

November 2010

New Wi-Fi Spec Simplifies Connectivity

Expanded Top-Level Domains Could Spur Internet Real Estate Boom

October 2010

New Weapon in War on Botnets

September 2010

Content-Centered Internet Architecture Gets a Boost

Gesturing Going Mainstream

August 2010

Is Context-Aware Computing Ready for the Limelight?

Flexible Routing in the Cloud

Signal Congestion Rejuvenates Interest in Cell Paging-Channel Protocol

July 2010

New Protocol Improves Interaction among Networked Devices and Applications

Security for Domain Name System Takes a Big Step Forward

The ROADM to Smarter Optical Networking

Distributed Cache Goes Mainstream

June 2010

New Application Protects Mobile-Phone Passwords

WiGig Alliance Reveals Ultrafast Wireless Specification

Cognitive Radio Adds Intelligence to Wireless Technology

May 2010

New Product Uses Light Connections in Blade Server

April 2010

Browser Fingerprints Threaten Privacy

New Animation Technique Uses Motion Frequencies to Shake Trees

March 2010

Researchers Take Promising Approach to Chemical Computing

Screen-Capture Programming: What You See is What You Script

Research Project Sends Data Wirelessly at High Speeds via Light

February 2010

Faster Testing for Complex Software Systems

IEEE 802.1Qbg/h to Simplify Data Center Virtual LAN Management

Distributed Data-Analysis Approach Gains Popularity

Twitter Tweak Helps Haiti Relief Effort

January 2010

2010 Rings in Some Y2K-like Problems

Infrastructure Sensors Improve Home Monitoring

Internet Search Takes a Semantic Turn

December 2009

Phase-Change Memory Technology Moves toward Mass Production

IBM Crowdsources Translation Software

Digital Ants Promise New Security Paradigm

November 2009

Program Uses Mobile Technology to Help with Crises

More Cores Keep Power Down

White-Space Networking Goes Live

Mobile Web 2.0 Experiences Growing Pains

October 2009

More Spectrum Sought for Body Sensor Networks

Optics for Universal I/O and Speed

High-Performance Computing Adds Virtualization to the Mix

ICANN Accountability Goes Multinational

RFID Tags Chat Their Way to Energy Efficiency

September 2009

Delay-Tolerant Networks in Your Pocket

Flash Cookies Stir Privacy Concerns

Addressing the Challenge of Cloud-Computing Interoperability

Ephemeralizing the Web

August 2009

Bluetooth Speeds Up

Grids Get Closer

DCN Gets Ready for Production

The Sims Meet Science

Sexy Space Threat Comes to Mobile Phones

July 2009

WiGig Alliance Makes Push for HD Specification

New Dilemnas, Same Principles:
Changing Landscape Requires IT Ethics to Go Mainstream

Synthetic DNS Stirs Controversy:
Why Breaking Is a Good Thing

New Approach Fights Microchip Piracy

Technique Makes Strong Encryption Easier to Use

New Adobe Flash Streams Internet Directly to TVs

June 2009

Aging Satellites Spark GPS Concerns

The Changing World of Outsourcing

North American CS Enrollment Rises for First Time in Seven Years

Materials Breakthrough Could Eliminate Bootups

April 2009

Trusted Computing Shapes Self-Encrypting Drives

March 2009

Google, Publishers to Try New Advertising Methods

Siftables Offer New Interaction Model for Serious Games

Hulu Boxed In by Media Conglomerates

February 2009

Chips on Verge of Reaching 32 nm Nodes

Hathaway to Lead Cybersecurity Review

A Match Made in Heaven: Gaming Enters the Cloud

January 2009

Government Support Could Spell Big Year for Open Source

25 Reasons For Better Programming

Web Guide Turns Playstation 3 Consoles into Supercomputing Cluster

Flagbearers for Technology: Contemporary Techniques Showcase US Artifact and European Treasures

December 2008

.Tel TLD Debuts As New Way to Network

Science Exchange

November 2008

The Future is Reconfigurable

Intel Chips Step up to 3D

by George Lawton

Intel has introduced 22-nm Tri-Gate chips that use a new process technology for patterning transistors in 3D. "We achieved twice the usual generational gain with the move to 3D," said Mike Mayberry, director of components research with Intel's Technology & Manufacturing Group.

The new design can improve performance by 37 percent owing to transitions from 32 to 22 nm technology and from a planar transistor to a 3D transistor. The new transistors will use less than half the power at the same performance as 2D 32 nm chips.

Intel plans to release the Ivy Bridge line of chips based on the new process later this year for servers, desktops, and laptops. Products for smart phones and other mobile devices will come later.

The main contributor to this improvement is the fully depleted operation of the transistor allowed by the transition to 3D, Mayberry said. The new transistor design raises electrical components up, thereby increasing the contact ratio between the control wires and active transistor material. This increased contact ratio provides a larger area for the electrons to move through and decreases the distances they must travel to leave the transistor. These features help fully deplete the electrons from the transistor when it's turned off, leading to more power efficiency and greater switching speed.

Chip Evolution

Intel's new design incorporates two fundamental advances in semiconductor fabrication methodologies: a 3D transistor design and a Tri-Gate controller.

The holy grail of 3D design is to stack multiple transistor elements on top of each other. One fundamental limitation of silicon chips is that most of the computing activity occurs across a 2D pattern within a very thin layer of electrical activity across the surface. By stacking multiple layers on top of one another, it becomes possible to multiply the chip's computing power by the number of layers and reduce the distance between compute elements.

But true stacked 3D chips face manufacturing challenges. The processes of etching the transistors and wires on a chip use extreme temperatures and caustic chemicals, which make it difficult to add many layers. However, the new Tri-Gate transistor features didn't require any major changes to the equipment set, just the addition of a few extra steps.

"This technology does not directly affect stacking at either wafer or die level," Mayberry explained. "For  other 3D approaches, all of the chip steps are completed separately for the two wafers to be stacked. Stacking does not produce cost savings in the way that density improvements do."

Instead, Intel has slightly tuned its existing fabrication process to form taller transistor elements. This allows transistor control wires to be affixed to side surfaces, in addition to the top. This technique not only increases the surface area but also reduces the absolute distance between the control elements and the transistor's center. All these physical attributes combine to reduce the depletion rate by 10 times, which in turn reduces the power required to control the transistor and the time required to switch its state.

"A planar transistor carries most of the currents in the surface when it is turned on," Mayberry explained. "Since we've folded the channel surface, there is a density advantage as we pack more current into a smaller space. Further, since the 3D gate has better control of the whole of the channel, the transistor has better shut-off characteristics and that especially improves the performance at low voltage, which is a major power benefit.”

Both packing density and power performance gain from this structure. For instance, the SRAM cell size has been reduced by about 50 percent from 32 nm.

Three-Wire Secrets?

In theory, the three gates in the new chips could be wired separately and used to create new kinds of logical building blocks for chip designs. But at the moment, Intel plans to use only a single wire to drive all three gates to improve chip performance and power usage.

"We've investigated controlling each of the sides separately within the research projects but have not put those forward into development," Mayberry said. "In the version announced, the three gates share common wiring, and so there are no additional wires required. It's simply a case of there not being enough room for three wires."

But Richard Doherty, a chip design analyst with the Envisioneering Group, said that Intel might just be holding some advanced designs close to the vest. "They don't want to trigger any rival design awareness or alternative approaches that might challenge their early experience with three-wire controls," he said.

Just Another Step

"I'’s a notable iterative step, particularly in reducing switching-energy levels and wasted heat, but it's not quite the unique game changer Intel portrayed," said Doherty. He expects many other chip-manufacturers including IBM, Samsung. AMD, and others to use Intel's lessons to improve their own designs. "Intel will be facing a lot of process competition, which will be good for everybody. Intel has legitimized 3D structures, so others will have their own take on processes and technologies which benefit all future chip design options."

George Lawton is a freelance technology writer based in Guerneville, CA. Contact him at glawton@glawon.com.