IEEE Transactions on Computers
IEEE Transactions on Computers (TC) is a monthly publication that publishes research in such areas as computer organizations and architectures, digital devices, operating systems, and new and important applications and trends.
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From the October 2018 issue
Subpage-Aware Solid State Drive for Improving Lifetime and Performance
By Mincheol Kang, Wonyoung Lee, and Soontae Kim
The manufacturers of NAND flash-based solid-state drives (SSDs) are increasing capacity and throughput by enlarging their page size, which is the minimum I/O unit in the NAND flash chips. Because the host and NAND flash chips have different I/O granularity units, the number of subpage requests increases. However, these subpage requests, especially writes, can cause internal fragmentation and endurance problems. Furthermore, subpage write requests inevitably involve read-modify-write (RMW) operations that increase the write response time because of the out-place-update feature in the NAND flash chips. In this paper, we propose a subpage-aware SSD to increase the lifetime and performance by reducing the number of NAND writes and eliminating unnecessary RMW operations. Our scheme attempts to merge subpage write requests to full page write requests in the write buffer to reduce the number of NAND writes and adds size information to the mapping table to detect unnecessary RMW operations. Our proposed scheme reduces the number of NAND writes by up to 30 and 19 percent on average and the write response time by up to 22 and 13 percent on average.
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Call for Papers
- Special Section on Computer Arithmetic - Submission deadline: 15 Oct. 2018
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- Introduction to the Special Issue on Computer Arithmetic (December 2017)
- Special Section on Advanced Techniques for Efficient and Reliable Cloud Storage (August 2016)
- Special Section on Emerging Memory Technologies in Very Large Scale Computing and Storage Systems (April 2016)
- IEEE Transactions on Computers and IEEE Transactions on Nanotechnology Joint Special Section on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (March 2016)
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A Message from Editor-in-Chief Paolo Montuschi
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