IEEE Transactions on Computers
IEEE Transactions on Computers (TC) is a monthly publication that publishes research in such areas as computer organizations and architectures, digital devices, operating systems, and new and important applications and trends.
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From the March 2017 issue
Linear Branch Entropy: Characterizing and Optimizing Branch Behavior in a Micro-Architecture Independent Way
By Sander De Pestel, Stijn Eyerman, and Lieven Eeckhout
In this paper, we propose linear branch entropy, a new metric for characterizing branch behavior. Linear branch entropy is independent of the configuration of a specific branch predictor, but is highly correlated with the branch misprediction rate of any predictor. In particular, we empirically derive a linear relationship between linear branch entropy and branch misprediction rate, which enables predicting miss rates for a range of branch predictors using a single branch entropy profile. Linear branch entropy is more accurate than previously proposed branch classification models, such as taken rate and transition rate. In addition, linear branch entropy provides insight for both analyzing an application’s inherent branch behavior as well as for understanding a branch predictor’s performance for easy-to-predict versus hard-to-predict branches. We present several case studies, ranging from comparing state-of-the-art branch predictors to compiler optimizations. More in particular, we find that the winner of the latest branch predictor competition outperforms the runners-up on easy-to-predict branches, but performs worse on hard-to-predict branches. We also show that using linear branch entropy to guide if-conversion in compilers leads to better performance compared to standard if-conversion heuristics.
Editorials and Announcements
Editor's pick of the year 2016 (4 selected papers, each one free-to-download for three months in 2017)
- (January-March 2017) - Memory Bandwidth Management for Efficient Performance Isolation in Multi-Core Platforms, by Heechul Yun, Gang Yao, Rodolfo Pellizzoni, Marco Caccamo, and Lui Sha (IEEE Transactions on Computers, Volume: 65, Issue: 2, February 2016, pages 562-576, DOI: 10.1109/TC.2015.2425889).
- (April-June 2017) - Conﬁgurable XOR Hash Functions for Banked Scratchpad Memories in GPUs, by Gert-Jan van den Braak, Juan Gomez-Luna, Jose Marıa Gonzalez-Linares, Henk Corporaal, and Nicolas Guil (IEEE Transactions on Computers, Volume: 65, Issue: 7, July 2016, pages 2045-2058, DOI: 10.1109/TC.2015.2479595).
- (July-September 2017) - Optimised Multiplication Architectures for Accelerating Fully Homomorphic Encryption, by Xiaolin Cao, Ciara Moore, Maire O’Neill, Elizabeth O’Sullivan, and Neil Hanley (IEEE Transactions on Computers, Volume: 65, Issue: 9, September 2016, pages 2794-2806, DOI: 10.1109/TC.2015.2498606).
- (September-December 2017) - A New Design of In-Memory File System Based on File Virtual Address Framework by Edwin H.-M. Sha, Xianzhang Chen, Qingfeng Zhuge, Liang Shi, and Weiwen Jiang (IEEE Transactions on Computers, Volume: 65, Issue: 10, October 2016, pages 2959-2972, DOI: 10.1109/TC.2016.2516019).
- Editor's pick of the year selection, announced in the July 2016 Editorial
- Multimedia presentations of each monthly featured paper are now available in Chinese, English and Spanish
- Get Your Journals as eBooks for Free
- Special Section on Cryptographic Engineering in a Post-Quantum World
Deadline: April 10, 2017
- Special Section on Advanced Techniques for Efficient and Reliable Cloud Storage (August 2016)
- Special Section on Emerging Memory Technologies in Very Large Scale Computing and Storage Systems (April 2016)
- IEEE Transactions on Computers and IEEE Transactions on Nanotechnology Joint Special Section on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (March 2016)
New Essential Set
- "Cloud Computing" available at computer.org/store
- "Industrial Implementations of Floating-Point Units" available at computer.org/store
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A Message from Editor-in-Chief Paolo Montuschi
Importance of Coherence Protocols with Network Applications on Multi-Core Processors
Automated Generation of Performance and Dependability Models for the Assessment of Wireless Sensor Networks