Scalable Power Management for On-Chip
NOV 15, 2016 15:03 PM
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Scalable Power Management for On-Chip

Scalable Power Management for On-Chip

Muhammad Shafique , Chair for Embedded Systems (CES), Karlsruhe Institute of Technology (KIT), Germany
Anton Ivanov, Chair for Embedded Systems (CES), Karlsruhe Institute of Technology (KIT), Germany
Benjamin Vogel, Chair for Embedded Systems (CES), Karlsruhe Institute of Technology (KIT), Germany
Jorg Henkel, Chair for Embedded Systems (CES), Karlsruhe Institute of Technology (KIT), Germany ABSTRACT

We present a scalable Dynamic Power Management (DPM) scheme where malleable applications may change their degree of parallelism at run time depending upon the workload and performance constraints. We employ a per-application predictive power manager that autonomously controls the power states of the cores with the goal of energy efficiency.

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