Concertina: Squeezing in Cache Content to Operate at Near-Threshold Voltage
AUG 01, 2017 16:49 PM
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Concertina: Squeezing in Cache Content to Operate at Near-Threshold Voltage

Concertina: Squeezing in Cache Content to Operate at Near-Threshold Voltage

Alexandra Ferreron, Departmento de Informática e Ingeniería de Sistemas and the Instituto de Investigación en Ingeniería de Aragón (I3A), Universidad de Zaragoza, Spain Dario Suarez-Gracia, Qualcomm Research Silicon Valley, Santa Clara, CA
Jesus Alastruey-Benede, Departmento de Informática e Ingeniería de Sistemas and the Instituto de Investigación en Ingeniería de Aragón (I3A), Universidad de Zaragoza, Spain
Teresa Monreal-Arnal, Departamento de Arquitectura de Computadores, Universitat Politècnica de Catalunya, Spain
Pablo Ibanez, Departmento de Informática e Ingeniería de Sistemas and the Instituto de Investigación en Ingeniería de Aragón (I3A), Universidad de Zaragoza, Spain

A novel last-level cache (LLC) reliably operates at low voltages with conventional SRAM cells, compressing cache blocks to enable full use of the LLC capacity.

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