B. Ramakrishna Rau Award

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Rau Past Recipients

Past Recipients for B. Ramakrishna Rau Award

2016 Gurindar S. Sohi For pioneering techniques enabling instruction-level parallelism and speculative multithreading via cooperative resource scheduling between offline compiler and runtime micro-architecture elements.
2015 Robert P. Colwell For contributions to critical analysis of microarchitecture and the development of the Pentium Pro processor.
2014 Wen-mei W. Hwu For contributions to Instruction Level Parallelism technology, including compiler optimization, program representation, microarchitecture, and applications.
2013 Kemal Ebcioglu

For contributions to VLIW, instruction-level-parallelism, binary translation,Java performance, and service to the community.

2012 Joseph A. (Josh) Fisher

For the development of trace scheduling compilation and pioneering work in VLIW (Very Long Instruction Word) architectures.

2011 Yale N. Patt

For significant contributions and inspiring leadership in the microarchitecture community with respect to teaching, mentoring, research, and service.


Rau Press Releases

Dr. Gurindar S. Sohi Named Recipient of 2016 IEEE Computer Society B. Ramakrishna Rau Award

LOS ALAMITOS, Calif., 22 August 2016 - IEEE Computer Society Awards committee selected Dr. Gurindar S. Sohi to receive the 2016 B. Ramakrishna Rau Award, “For pioneering techniques enabling instruction-level parallelism and speculative multithreading via cooperative resource scheduling between offline compiler and runtime micro-architecture elements.”
Gurindar (Guri) Sohi has been a faculty member at the University of Wisconsin-Madison since 1985 where he currently a Vilas Research Professor, a John P. Morgridge Professor and the E. David Cronon Professor of Computer Sciences. He was the Chair of the Computer Sciences Department from 2004 until 2008.
Sohi's research has been in the design of high-performance microprocessors and computer systems. Results from his research can be found in almost every high-end microprocessor in the market today. He has taught classes ranging from introductory freshmen to advanced graduate and supervised 20 PhD students.
He received the 1999 ACM SIGARCH Maurice Wilkes award "for seminal contributions in the areas of high issue rate processors and instruction level parallelism" and the 2011 ACM/IEEE Eckert-Mauchly Award "for pioneering widely used micro-architectural techniques for instruction-level parallelism.”
At the University of Wisconsin he was selected as a Vilas Associate in 1997, a WARF Kellett Mid-Career Faculty Researcher in 2000, a WARF Named Professor in 2007, and a Vilas Research Professor in 2015. He is a Fellow of both the ACM and the IEEE and was elected to the National Academy of Engineering in 2009.
A certificate and a $2000 honorarium are awarded by the Computer Society in recognition of important work related to microarchitectural technology, including both hardware and compiler optimization. The award is presented for significant contributions in the field of computer microarchitecture and compiler code generation. Further information about the award, including a list of past recipients, may be found at https://www.computer.org/web/awards/rau.
The Rau award will be presented at the MICRO-49 Conference on Tuesday, 18 October 2016 in Taipei, Taiwan.
The B. Ramakrishna Rau Award was established in memory of B. Ramakrishna Rau, and awarded in recognition of his distinguished career in promoting and expanding the use of innovative computer microarchitecture techniques, including his innovation in compiler technology, his leadership in academic and industrial computer architecture, and his extremely high personal and ethical standards.
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