Tradeoffs in the Design of Efficient Algorithm-Based Error Detection Schemes for Hypercube Multiprocessors
Issue No. 02 - February (1990 vol. 16)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/32.44381
<p>The authors provide an in-depth study of the various issues and tradeoffs available in algorithm-based error detection, as well as a general methodology for evaluating the schemes. They illustrate the approach on an extremely useful computation in the field of numerical linear algebra: QR factorization. They have implemented and investigated numerous ways of applying algorithm-based error detection using different system-level encoding strategies for QR factorization. Specifically, schemes based on the checksum and sum-of-squares (SOS) encoding techniques have been developed. The results of studies performed on a 16-processor Intel iPSC-2/D4/MX hypercube multiprocessor are reported. It is shown that, in general, the SOS approach gives much better coverage (85-100%) for QR factorization while maintaining low overheads (below 10%).</p>
hypercube multiprocessors; algorithm-based error detection; numerical linear algebra; QR factorization; encoding; checksum; sum-of-squares; 16-processor Intel iPSC-2/D4/MX; encoding; error detection; linear algebra; multiprocessing systems; software engineering.
P. Banerjee, V. Balasubramanian, "Tradeoffs in the Design of Efficient Algorithm-Based Error Detection Schemes for Hypercube Multiprocessors", IEEE Transactions on Software Engineering, vol. 16, no. , pp. 183-196, February 1990, doi:10.1109/32.44381