Issue No. 02 - March/April (2012 vol. 9)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TDSC.2011.54
Antonio Martínez-Álvarez , University of Alicante, San Vicente del Raspeig
Sergio A. Cuenca-Asensi , University of Alicante, San Vicente del Raspeig
Felipe Restrepo-Calle , University of Alicante, San Vicente del Raspeig
Francisco R. Palomo Pinto , University of Sevilla, Sevilla
Hipólito Guzmán-Miranda , University of Sevilla, Sevilla
Miguel A. Aguirre , University of Sevilla, Sevilla
The protection of processor-based systems to mitigate the harmful effect of transient faults (soft errors) is gaining importance as technology shrinks. At the same time, for large segments of embedded markets, parameters like cost and performance continue to be as important as reliability. This paper presents a compiler-based methodology for facilitating the design of fault-tolerant embedded systems. The methodology is supported by an infrastructure that permits to easily combine hardware/software soft errors mitigation techniques in order to best satisfy both usual design constraints and dependability requirements. It is based on a generic microprocessor architecture that facilitates the implementation of software-based techniques, providing a uniform isolated-from-target hardening core that allows the automatic generation of protected source code (hardened code). Two case studies are presented. In the first one, several software-based mitigation techniques are implemented and evaluated showing the flexibility of the infrastructure. In the second one, a customized fault tolerant embedded system is designed by combining selective protection on both hardware and software. Several trade-offs among performance, code size, reliability, and hardware costs have been explored. Results show the applicability of the approach. Among the developed software-based mitigation techniques, a novel selective version of the well known SWIFT-R is presented.
Fault tolerance, reliability, soft error, single event upset—SEU, embedded systems design, hardware/software co-design, design space exploration.
H. Guzmán-Miranda, F. Restrepo-Calle, M. A. Aguirre, F. R. Palomo Pinto, A. Martínez-Álvarez and S. A. Cuenca-Asensi, "Compiler-Directed Soft Error Mitigation for Embedded Systems," in IEEE Transactions on Dependable and Secure Computing, vol. 9, no. , pp. 159-172, 2011.