The Community for Technology Leaders
RSS Icon
Issue No.02 - April-June (2009 vol.6)
pp: 152-158
Dimitris Gizopoulos , University of Piraeus, Piraeus
Online periodic self-testing is a cost-effective technique to ensure correct operation of microprocessor-based systems in the field and improve their dependability in the presence of failures caused by components aging/wearout. Effective online self-test tasks in embedded systems should have limited resource requirements: memory, execution time, and power consumption, while at the same time, they should guarantee the highest possible self-test quality levels. These requirements are not always easy to satisfy in real-time embedded systems with hard task deadlines. In this paper, we investigate the maximization of the effective self-test utilization and present solutions for the scheduling of online self-test tasks in hard real-time systems. The primary goal is to guarantee high self-test quality without affecting the deadline requirements of normal hard real-time tasks. We show that with appropriate selection of the periodicity of the self-test tasks, these goals can be met.
Online periodic testing, instruction-based self-test, software-based self-test, real-time scheduling, dependable embedded systems.
Dimitris Gizopoulos, "Online Periodic Self-Test Scheduling for Real-Time Processor-Based Systems Dependability Enhancement", IEEE Transactions on Dependable and Secure Computing, vol.6, no. 2, pp. 152-158, April-June 2009, doi:10.1109/TDSC.2009.12
[1] Advances in Electronic Testing: Challenges and Methodologies, D.Gizopoulos,ed. Springer, 2006.
[2] C. Constantinescu, “Trends and Challenges in VLSI Circuit Reliability,” IEEE Micro, vol. 23, no. 4, pp.14-19, July/Aug. 2003.
[3] R. Baumann, “Soft Errors in Advanced Computer Systems,” IEEE Design and Test of Computers, vol. 22, no. 3, pp.258-266, May/June 2005.
[4] S. Mukherjee, Architecture Design for Soft Errors. Morgan Kaufmann, 2008.
[5] M. Nicolaidis and Y. Zorian, “Online Testing for VLSI—A Compendium of Approaches,” J. Electronic Testing: Theory and Applications, vol. 12, pp.7-20, 1998.
[6] I. Koren and C.M. Krishna, Fault-Tolerant Systems. Morgan Kaufmann, 2007.
[7] I. Voyiatzis, A. Paschalis, D. Gizopoulos, N. Kranitis, and C. Halatsis, “A Concurrent Built-In Self-Test Architecture Based on a Self-Testing RAM,” IEEE Trans. Reliability, vol. 54, no. 1, pp.69-78, Mar. 2005.
[8] D. Gizopoulos, A. Paschalis, and Y. Zorian, Embedded Processor-Based Self-Test. Springer, Dec. 2004.
[9] P. Parvathala, K. Maneparambil, and W. Lindsay, “FRITS—A Microprocessor Functional BIST Method,” Proc. IEEE Int'l Test Conf., pp.590-598, 2002.
[10] I. Bayraktaroglu, J. Hunt, and D. Watkins, “Cache Resident Functional Microprocessor Testing: Avoiding High Speed IO Issue,” Proc. IEEE Int'l Test Conf., pp. 1-7, 2006.
[11] F. Corno, M.S. Reorda, G. Squillero, and M. Violante, “On the Test of Microprocessor IP Cores,” Proc. IEEE Design Automation and Test in Europe, pp.209-213, 2001.
[12] L. Chen, S. Ravi, A. Raghunathan, and S. Dey, “A Scalable Software-Based Self-Test Methodology for Programmable Processors,” Proc. IEEE/ACM Design Automation Conf., pp.548-553, 2003.
[13] N. Kranitis, A. Paschalis, D. Gizopoulos, and G. Xenoulis, “Software-Based Self-Testing of Embedded Processors,” IEEE Trans. Computers, vol. 54, no. 4, pp.461-475, Apr. 2005.
[14] C. Wen, L.-C. Wang, K.-T. Cheng, W.-T. Liu, and C.-C. Chen, “On a Software-Based Self-Test Methodology and Its Application,” Proc. IEEE Very Large Scale Integration (VLSI) Test Symp., pp.107-113, 2005.
[15] V. Singh, M. Inoue, K.K. Saluja, and H. Fujiwara, “Instruction-Based Self-Testing of Delay Faults in Pipelined Processors,” IEEE Trans. VLSI Systems, vol. 14, no. 11, pp.1203-1215, Nov. 2006.
[16] S. Gurumurthy, S. Vasudevan, and J. Abraham, “Automatic Generation of Instruction Sequences Targeting Hard-to-Detect Structural Faults in a Processor,” Proc. IEEE Int'l Test Conf., pp. 1-9, 2006.
[17] D. Gizopoulos, M. Psarakis, M. Hatzimihail, M. Maniatakos, A. Paschalis, A. Raghunathan, and S. Ravi, “Systematic Software-Based Self-Test for Pipelined Processors,” IEEE Trans. VLSI Systems, vol. 16, no. 11, pp. 1441-1453, Nov. 2008.
[18] A. Apostolakis, M. Psarakis, D. Gizopoulos, and A. Paschalis, “Functional Processor-Based Testing of Communication Peripherals in Systems-on-Chip,” IEEE Trans. Very Large Scale Integration (VLSI) Systems, vol. 15, no. 8, pp.971-975, Aug. 2007.
[19] A. Paschalis and D. Gizopoulos, “Effective Software-Based Self-Test Strategies for On-Line Periodic Testing of Embedded Processors,” IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 24, no. 1, pp.88-99, Jan. 2005.
[20] D. Gizopoulos, “Low-Cost, On-Line Self-Testing of Processor Cores Based on Embedded Software Routines,” Microelectronics J., vol. 35, no. 5, pp.443-449, May 2004.
[21] G. Xenoulis, D. Gizopoulos, N. Kranitis, and A. Paschalis, “Low-Cost, On-Line Software-Based Self-Testing of Embedded Processor Cores,” Proc.IEEE Int'l Online Testing Symp. (IOLTS), pp.149-154, 2003.
[22] M. Moraes, E. Cota, L. Carro, F. Wagner, and M. Lubaszewski, “A Constraint-Based Solution for On-Line Testing of Processors Embedded in Real-Time Applications,” Proc. ACM Symp. Integrated Circuits and Systems Design (SBCCI), pp.68-73, 2005.
[23] E. Sanchez, M.S. Reorda, and G. Squillero, “On the Transformation of Manufacturing Test Sets into On-Line Test Sets for Microprocessors,” Proc. IEEE Symp. Defect and Fault Tolerance (DFTS), pp.494-502, Oct. 2005.
[24] P. Bernardi, L. Bolzani, A. Manzone, M. Osella, M. Violante, and M.S. Reorda, “Software-Based Online Test of Communication Peripherals in Processor-Based Systems for Automotive Applications,” Proc. IEEE Microprocessor Test and Verification Workshop (MTV), 2006.
[25] J.W.S. Liu, Real-Time Systems. Prentice Hall, 2000.
[26] C.L. Liu and J. Layland, “Scheduling Algorithms for Multiprogramming in a Hard Real-Time Environment,” J. ACM, vol. 20, pp.46-61, 1973.
[27] T.W. Ku and A.K. Mok, “Load Adjustment in Adaptive Real-Time Systems,” Proc. IEEE Real-Time Systems Symp., Dec. 1991.
[28] E. Bini, G.C. Buttazzo, and G.M. Buttazzo, “A Hyperbolic Bound for the Rate Monotonic Algorithm,” Proc. 13th Euromicro Conf. Real-Time Systems, pp.59-66, 2001.
[29] N. Kranitis, A. Merentitis, G. Theodorou, A. Paschalis, and D. Gizopoulos, “Hybrid-SBST Methodology for Efficient Testing of Processor Cores,” IEEE Design and Test of Computers, vol. 25, no. 1, pp.64-75, Jan./Feb. 2008.
[30] OpenRISC1200, , 2008.
[31] G. Xenoulis, D. Gizopoulos, M. Psarakis, and A. Paschalis, “Instruction-Based On-Line Periodic Self-Testing of Microprocessors with Floating-Point Units,” to be published in IEEE Trans. Dependable and Secure Computing.
[32] Cheddar: A Free Real-Time Scheduling Analyzer, , 2009.
34 ms
(Ver 2.0)

Marketing Automation Platform Marketing Automation Tool