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<p><it>Abstract</it>— The reconfigurable mesh captures salient features from a variety of sources, including the CAAPP, the CHiP, the polymorphic-torus network and the bus automaton. It consists of an array of processors interconnected by a reconfigurable bus system. The bus system can be used to dynamically obtain various interconnection patterns between the processors. In this paper, we present a fast algorithm for computing the histogram of an <it>N</it>×<it>N</it> image with <it>h</it> grey levels in<f><tf>$$O\!\!\left({\bf min}\!\left\{\sqrt h + {\bf log^*} (N/h), N\right\}\!\right)$$</tf></f>time on an <it>N</it>×<it>N</it> reconfigurable mesh assuming each PE has a constant amount of local memory. This algorithm runs on the PARBUS and MRN/LRN models. In addition, histogram modification can be performed in <math><tmath>$O(\sqrt h)$</tmath></math> time on the same model.</p><p>A variant of our algorithm runs in<f><tf>$$O\!\!\left({\bf min}\!\left\{\sqrt {\bf h} + {\bf log\ log} (N/h), N\right\}\!\right)$$</tf></f>time on an <it>N</it>×<it>N</it> RMESH in which each PE has constant storage. This result improves the known time and memory bounds for histogramming on the RMESH model.</p>
Histogram, reconfigurable mesh, mapping, parallel algorithm.

H. Park, J. Jang and V. K. Prasanna, "A Fast Algorithm for Computing a Histogram on Reconfigurable Mesh," in IEEE Transactions on Pattern Analysis & Machine Intelligence, vol. 17, no. , pp. 97-106, 1995.
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