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<p>A high-performance logic circuit diagram reader was developed for VLSI-CAD data input. Almost all logic circuit symbols include one or more loop structures. A description is given of an efficient method for recognition of these loop-structured symbols. The proposed method consists of two processes: symbol segmentation and symbol identification. Symbol identification is achieved by a powerful hybrid method which uses heuristics to mediate between template matching and feature extraction. The entire symbol recognition process is carried out under a decision-tree control strategy. The entire recognition system for circuit diagrams is briefly explained, including character string recognition and connecting line analysis.</p>
computerised pattern recognition; automatic circuit diagram reader; loop-structure-based symbol recognition; logic circuit diagram reader; VLSI-CAD; symbol segmentation; symbol identification; template matching; feature extraction; decision-tree control; character string recognition; connecting line analysis; circuit CAD; computer vision; computerised pattern recognition; logic CAD
S. Tsunekawa, A. Okazaki, E. Kawamoto, K. Mori, T. Kondo, "An Automatic Circuit Diagram Reader with Loop-Structure-Based Symbol Recognition", IEEE Transactions on Pattern Analysis & Machine Intelligence, vol. 10, no. , pp. 331-341, May 1988, doi:10.1109/34.3898
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