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<p>The implementation of a Hough transform processor using a wafer-scale-integration technology, restructurable VLSI circuit is described. The Hough transform is typically used as a grouping operation in an image processing sequence. The transform discussed here groups pixels in order to extract linear features. This calculation is realized with a wafer-scale processor that allows a complete line extraction system to be integrated on a single PC board. Also discussed is the use of the CAD tools that allowed this processor to be realized without incurring silicon layout and processing overhead.</p>
pixel grouping; linear feature extraction; PCB; WSI technology; monolithic Hough transform processor; restructurable VLSI; wafer-scale-integration technology; image processing; PC board; CAD tools; circuit CAD; computerised pattern recognition; digital arithmetic; microprocessor chips; monolithic integrated circuits; transforms; VLSI
F.M. Rhodes, B.E. Emerson, G.H. Chapman, J.J. Dituri, J.I. Raffel, A.M. Soares, "A Monolithic Hough Transform Processor Based on Restructurable VLSI", IEEE Transactions on Pattern Analysis & Machine Intelligence, vol. 10, no. , pp. 106-110, January 1988, doi:10.1109/34.3873
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