Issue No. 02 - April (1992 vol. 4)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/69.134250
<p>Discusses the development of formal protocols for handling error tolerance which allow a precise determination of the computational gains that may be expected. The error protocols are illustrated in the framework of a densely interconnected neural network architecture (with associative memory the putative application), and rigorous calculations of capacity ar shown. Explicit capacities are also derived for the case of feedforward neural network configurations.</p>
error tolerance; neural networks; formal protocols; error protocols; densely interconnected neural network architecture; associative memory; feedforward neural network configurations; content-addressable storage; fault tolerant computing; neural nets; protocols
S. Venkatesh, "The Science of Making ERORS: What Error Tolerance Implies for Capacity in Neural Networks," in IEEE Transactions on Knowledge & Data Engineering, vol. 4, no. , pp. 135-144, 1992.