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Issue No. 03 - March (2016 vol. 27)
ISSN: 1045-9219
pp: 682-694
E. Stafford , Ing. Informática y Electrónica, Universidad de Cantabria, Santander, Cantabria, Spain
J. L. Bosque , Ing. Informática y Electrónica, Universidad de Cantabria, Santander, Cantabria, Spain
C. Martinez , Ing. Informática y Electrónica, Universidad de Cantabria, Santander, Cantabria, Spain
F. Vallejo , Ing. Informática y Electrónica, Universidad de Cantabria, Santander, Cantabria, Spain
R. Beivide , Ing. Informática y Electrónica, Universidad de Cantabria, Santander, Cantabria, Spain
C. Camarero , Ing. Informática y Electrónica, Universidad de Cantabria, Santander, Cantabria, Spain
E. Castillo , Ing. Informática y Electrónica, Universidad de Cantabria, Santander, Cantabria, Spain
ABSTRACT
In the late years many different interconnection networks have been used with two main tendencies. One is characterized by the use of high-degree routers with long wires while the other uses routers of much smaller degree. The latter rely on two-dimensional mesh and torus topologies with shorter local links. This paper focuses on doubling the degree of common 2D meshes and tori while still preserving an attractive layout for VLSI design. By adding a set of diagonal links in one direction, diagonal networks are obtained. By adding a second set of links, networks of degree eight are built, named king networks. This research presents a comprehensive study of these networks which includes a topological analysis, the proposal of appropriate routing procedures and an empirical evaluation. King networks exhibit a number of attractive characteristics which translate to reduced execution times of parallel applications. For example, the execution times NPB suite are reduced up to a 30 percent. In addition, this work reveals other properties of king networks such as perfect partitioning that deserves further attention for its convenient exploitation in forthcoming high-performance parallel systems.
INDEX TERMS
Routing, Topology, Network topology, System recovery, Bandwidth, Multiprocessor interconnection, System-on-chip
CITATION

E. Stafford et al., "Assessing the Suitability of King Topologies for Interconnection Networks," in IEEE Transactions on Parallel & Distributed Systems, vol. 27, no. 3, pp. 682-694, 2016.
doi:10.1109/TPDS.2015.2409865
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