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Issue No. 07 - July (2012 vol. 23)
ISSN: 1045-9219
pp: 1205-1215
Maurizio Palesi , Kore University, Enna
Alexandre (Alex) Yakovlev , Newcastle University, Newcastle upon Tyne
Terrence Mak , Newcastle University, Newcastle upon Tyne
Ra'ed Al-Dujaily , Newcastle University, Newcastle upon Tyne
Fei Xia , Newcastle University, Newcastle upon Tyne
Interconnection networks with adaptive routing are susceptible to deadlock, which could lead to performance degradation or system failure. Detecting deadlocks at runtime is challenging because of their highly distributed characteristics. In this paper, we present a deadlock detection method that utilizes runtime transitive closure (TC) computation to discover the existence of deadlock-equivalence sets, which imply loops of requests in networks-on-chip (NoCs). This detection scheme guarantees the discovery of all true deadlocks without false alarms in contrast with state-of-the-art approximation and heuristic approaches. A distributed TC-network architecture, which couples with the NoC infrastructure, is also presented to realize the detection mechanism efficiently. Detailed hardware realization architectures and schematics are also discussed. Our results based on a cycle-accurate simulator demonstrate the effectiveness of the proposed method. It drastically outperforms timing-based deadlock detection mechanisms by eliminating false detections and, thus, reducing energy wastage in retransmission for various traffic scenarios including real-world application. We found that timing-based methods may produce two orders of magnitude more deadlock alarms than the TC-network method. Moreover, the implementations presented in this paper demonstrate that the hardware overhead of TC-networks is insignificant.
Networks-on-chip, deadlock detection, dynamic programming, transitive closure computation, performance analysis.
Maurizio Palesi, Alexandre (Alex) Yakovlev, Terrence Mak, Ra'ed Al-Dujaily, Fei Xia, "Embedded Transitive Closure Network for Runtime Deadlock Detection in Networks-on-Chip", IEEE Transactions on Parallel & Distributed Systems, vol. 23, no. , pp. 1205-1215, July 2012, doi:10.1109/TPDS.2011.275
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