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Issue No. 02 - February (2012 vol. 23)
ISSN: 1045-9219
pp: 242-254
Eun Jung Kim , Texas A&M University, College Station
Timothy Mark Pinkston , University of Southern California, Los Angeles
Yuho Jin , University of Southern California, Los Angeles
ABSTRACT
With continued Moore's law scaling, multicore-based architectures are becoming the de facto design paradigm for achieving low-cost and performance/power-efficient processing systems through effective exploitation of available parallelism in software and hardware. A crucial subsystem within multicores is the on-chip interconnection network that orchestrates high-bandwidth, low-latency, and low-power communication of data. Much previous work has focused on improving the design of on-chip networks but without more fully taking into consideration the on-chip communication behavior of application workloads that can be exploited by the network design. A significant portion of this paper analyzes and models on-chip network traffic characteristics of representative application workloads. Leveraged by this, the notion of globally coordinated on-chip networks is proposed in which application communication behavior—captured by traffic profiling—is utilized in the design and configuration of on-chip networks so as to support prevailing traffic flows well, in a globally coordinated manner. This is applied to the design of a hybrid network consisting of a mesh augmented with configurable multidrop (bus-like) spanning channels that serve as express paths for traffic flows benefiting from them, according to the characterized traffic profile. Evaluations reveal that network latency and energy consumption for a 64-core system running OpenMP benchmarks can be improved on average by 15 and 27 percent, respectively, with globally coordinated on-chip networks.
INDEX TERMS
On-chip network design, application communication characterization, performance modeling.
CITATION
Eun Jung Kim, Timothy Mark Pinkston, Yuho Jin, "Communication-Aware Globally-Coordinated On-Chip Networks", IEEE Transactions on Parallel & Distributed Systems, vol. 23, no. , pp. 242-254, February 2012, doi:10.1109/TPDS.2011.164
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