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Issue No. 10 - Oct. (2011 vol. 22)
ISSN: 1045-9219
pp: 1714-1721
Manhee Lee , National Security Research Institute, Daejeon
Minseon Ahn , Texas A&M University, College Station
Eun Jung Kim , Texas A&M University, College Station
Protection and security are becoming essential requirements in commercial servers. To provide secure memory and cache-to-cache communications, we presented Interconnect-Independent Security Enhanced Shared Memory Multiprocessor System (I^{2}SEMS), mainly focusing on how to manage a global counter to encrypt, decrypt, and authenticate data messages with little performance overhead. However, I^{2}SEMS was vulnerable to replay attacks on data messages and integrity attacks on control and counter messages. This paper proposes three authentication schemes to remove those security vulnerabilities. First, we prevent replay attacks on data messages by inserting Request Counter (RC) into request messages. Second, we also use RC to detect integrity attacks on control messages. Third, we propose a new counter, referred to as GCC Counter (GC), to protect the global counter messages. We simulated our design with SPLASH-2 benchmarks on up to 16-processor shared memory multiprocessor systems by using Simics with Wisconsin multifacet General Execution-driven Multiprocessor Simulator (GEMS). Simulation results show that the overall performance slowdown is 4 percent on average with the highest keystream hit rate of 78 percent.
Multiprocessor systems, shared memory, interprocessor communications, data encryption, authentication.

M. Lee, M. Ahn and E. J. Kim, "Fast Secure Communications in Shared Memory Multiprocessor Systems," in IEEE Transactions on Parallel & Distributed Systems, vol. 22, no. , pp. 1714-1721, 2011.
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