The Community for Technology Leaders
RSS Icon
Issue No.02 - February (2011 vol.22)
pp: 287-295
Peng Zhang , Stony Brook University, Stony Brook, NY
Reid Powell , Stony Brook University, Stony Brook, NY
Yuefan Deng , Stony Brook University, Stony Brook, NY
We introduce a new technique for generating more efficient networks by systematically interlacing bypass rings to torus networks (iBT networks). The resulting network can improve the original torus network by reducing the network diameter, node-to-node distances, and by increasing the bisection width without increasing wiring and other engineering complexity. We present and analyze the statement that a 3D iBT network proposed by our technique outperforms 4D torus networks of the same node degree. We found that interlacing rings of sizes 6 and 12 to all three dimensions of a torus network with meshes 30 \times 30 \times36 generate the best network of all possible networks, including 4D torus and hypercube of approximately 32,000 nodes. This demonstrates that strategically interlacing bypass rings into a 3D torus network enhances the torus network more effectively than adding a fourth dimension, although we may generalize the claim. We also present a node-to-node distance formula for the iBT networks.
Network topology, torus networks, bypass ring, network diameter, node-to-node distance, routing.
Peng Zhang, Reid Powell, Yuefan Deng, "Interlacing Bypass Rings to Torus Networks for More Efficient Networks", IEEE Transactions on Parallel & Distributed Systems, vol.22, no. 2, pp. 287-295, February 2011, doi:10.1109/TPDS.2010.89
[1] N.R. Adiga et al., "An Overview of the BlueGene/L Supercomputer," Proc. IEEE/ACM Supercomputing Conf., 2002.
[2] M.A. Blumrich et al., "Design and Analysis of the BlueGene/L Torus Interconnection Network," IBM Research Report, 2003.
[3] S.L. Scott and G.M. Thorson, "The Cray T3E Network: Adaptive Routing in a High Performance 3D Torus," Proc. Symp. High Performance Interconnects (Hot Interconnects 4), pp. 157-160, 1996.
[4] E. Anderson et al., "Performance of the CRAY T3E Multiprocessor," Proc. ACM/IEEE Conf. Supercomputing, CDROM, 1997.
[5] TOP500. Top 500 Supercomputer Sites, http:/, 2010.
[6] K.J. Barker et al., "Entering the Petaflop Era: The Architecture and Performance of Roadrunner," Proc. ACM/IEEE Conf. Supercomputing, 2008.
[7] L.N. Bhuyan and D.P. Agrawal, "Generalized Hypercube and Hyperbus Structures for a Computer Network," IEEE Trans. Computers, vol. C-33, no. 4, pp. 323-333, Apr. 1984.
[8] F. Harary, J.P. Hayes, and H.-J. Wu, "A Survey of the Theory of Hypercube Graphs," Computers and Math. with Applications, vol. 15, no. 4, pp. 277-289, 1988.
[9] K. Efe, "A Variation on the Hypercube with Lower Diameter," IEEE Trans. Computers, vol. 40, no. 11, pp. 1312-1316, Nov. 1991.
[10] R.P. Kaushal and J.S. Bedi, "Comparison of Hypercube, Hypernet, and Symmetric Hypernet Architectures," ACM SIGARCH Computer Architecture News, vol. 20, no. 5, pp. 13-25, 1992.
[11] V. Heun and E.W. Mayr, "Efficient Embeddings into Hypercube-Like Topologies," The Computer J., vol. 46, no. 6, pp. 632-644, 2003.
[12] F.P. Preparata and J. Vuillemin, "The Cube-Connected Cycles: A Versatile Network for Parallel Computation," Comm. ACM, vol. 24, no. 5, pp. 300-309, 1981.
[13] A. Harwood and H. Shen, "A Low Cost Hybrid Fat-Tree Interconnection Network," Proc. Int'l Conf. Parallel and Distributed Processing and Applications, 1998.
[14] B. Parhami and D.-M. Kwai, "Incomplete k-ary n-Cube and Its Derivatives," J. Parallel and Distributed Computing, vol. 64, no. 2, pp. 183-190, 2004.
[15] I. Stojmenovic, "Honeycomb Networks: Topological Properties and Communication Algorithms," IEEE Trans. Parallel and Distributed Systems, vol. 8, no. 10, pp. 1036-1042, Oct. 1997.
[16] C. Decayeux and D. Seme, "3D Hexagonal Network: Modeling, Topological Properties, Addressing Scheme and Optimal Routing Algorithm," IEEE Trans. Parallel and Distributed Systems, vol. 16, no. 9, pp. 875-884, Sept. 2005.
[17] W.W. Kirkman and D. Quammen, "Packed Exponential Connections—a Hierarchy of 2D Meshes," Proc. Fifth Int'l. Parallel Processing Symp., 1991.
[18] Y. Inoguchi and S. Horiguchi, "Shifted Recursive Torus Interconnection for High Performance Computing," Proc. IEEE CS High-Performance Computing on the Information Superhighway (HPC-Asia '97), 1997.
[19] V.K. Jain and S. Horiguchi, "VLSI Considerations for TESH: A New Hierarchical Interconnection Network for 3D Integration," IEEE Trans. Very Large Scale Integration (VLSI) Systems, vol. 6, no. 3, pp. 346-353, Sept. 1998.
[20] Y. Yang et al., "Recursive Diagonal Torus: An Interconnection Network for Massively Parallel Computers," IEEE Trans. Parallel and Distributed Systems, vol. 12, no. 7, pp. 701-715, July 2001.
[21] W.J. Dally, "Performance Analysis of k-ary n-Cube Interconnection Networks," IEEE Trans. Computers, vol. 39, no. 6, pp. 775-785, June 1990.
[22] J. Duato, S. Yalamanchili, and N. Lionel, Interconnection Networks: An Engineering Approach. Morgan Kaufmann Publishers Inc., 2002.
[23] W. Dally and B. Towles, Principles and Practices of Interconnection Networks. Morgan Kaufmann Publishers Inc., 2003.
[24] B. Parhami, "Swapped Interconnection Networks: Topological, Performance, and Robustness Attributes," J. Parallel and Distributed Computing, vol. 65, no. 11, pp. 1443-1452, 2005.
[25] N. Chaki et al., "A New Logical Topology Based on Barrel Shifter Network over an All Optical Network," Proc. 28th Ann. IEEE CS Int'l Conf. Local Computer Networks, 2003.
[26] M.R. Samatham and D.K. Pradhan, "The de Bruijn Multiprocessor Network: A Versatile Parallel Processing and Sorting Network for VLSI," IEEE Trans. Computers, vol. 38, no. 4, pp. 567-581, Apr. 1989.
38 ms
(Ver 2.0)

Marketing Automation Platform Marketing Automation Tool