Circuit Switching with Input Queuing: An Analysis for the d-Dimensional Wraparound Mesh and the Hypercube
Issue No. 04 - April (1997 vol. 8)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/71.588603
<p><b>Abstract</b>—We analyze circuit switching in a multiprocessor network, where connection requests (or sessions) arrive at each node of the network according to a Poisson process with rate λ. Each session joins the appropriate input-queue at its source node, and, upon advancing to the head of the queue, transmits a setup packet to establish a connection. If the setup packet is successful, it reserves the links on the path for the duration of the session, and the session is served without interruptions. Otherwise, the connection request remains queued at the source, and subsequent attempts are made to establish the circuit. We analyze the queue of connection requests at the input-buffer of a network link, and obtain analytic expressions for the stability region, the average queuing delay, the average connection time, the average waiting time, and the average total delay, which show how these parameters depend on system variables, such as network dimension and session arrival rate. The queuing analysis focuses on the input-queue of a particular link, and accounts for the interactions with queues of other links through the retrial attempts and the associated probability of success. The queuing analysis is independent of the particular network topology under consideration, as long as the probability that a session arriving at a random time successfully establishes a connection can be calculated for that network. Simulations demonstrate the close agreement between the observed network behavior and that predicted by the analysis.</p>
Circuit switching, input queuing, interconnection networks, wraparound meshes, hypercubes, queuing delay, connection delay, stability region.
V. Sharma and E. A. Varvarigos, "Circuit Switching with Input Queuing: An Analysis for the d-Dimensional Wraparound Mesh and the Hypercube," in IEEE Transactions on Parallel & Distributed Systems, vol. 8, no. , pp. 349-366, 1997.