Issue No. 08 - August (1995 vol. 6)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/71.406955
<p><it>Abstract</it>—In this paper, we introduce a cache protocol verification technique based on a symbolic state expansion procedure. A global Finite State Machine (FSM) model characterizing the protocol behavior is built and protocol verification becomes equivalent to finding whether or not the global FSM may enter erroneous states. In order to reduce the complexity of the state expansion process, all the caches in the same state are grouped into an equivalence class and the number of caches in the class is symbolically represented by a repetition constructor. This symbolic representation is partly justified by the symmetry and homogeneity of cache-based systems. However, the key idea behind the representation is to exploit a unique property of cache coherence protocols: the fact that protocol correctness is not dependent on the <it>exact</it> number of cached copies. Rather, symbolic states only need to keep track of whether the caches have 0, 1, or multiple copies. The resulting symbolic state expansion process only takes a few steps and verifies the protocol for any system size. Therefore, it is more efficient and reliable than current approaches.</p><p>The verification procedure is first applied to the verification of five existing protocols under the assumption of atomic protocol transitions. A simple snooping protocol on a split-transaction shared bus is also verified to illustrate the extension of our approach to protocols with nonatomic transitions.</p>
Cache coherence protocol, formal verification, finite state machine, symbolic expansion, shared-memory multiprocessor.
Michel Dubois, Fong Pong, "A New Approach for the Verification of Cache Coherence Protocols", IEEE Transactions on Parallel & Distributed Systems, vol. 6, no. , pp. 773-787, August 1995, doi:10.1109/71.406955