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<p><it>Abstract—</it>Traditional approaches to the distributed simulation of digital designs are limited in that they are inefficient and prone to deadlock for systems with feedback loops. This paper proposes an asynchronous distributed algorithm to the simulation and verification of behavior-level models and describes its implementation on an actual loosely-coupled parallel processor. The approach is relatively efficient for realistic digital designs and mathematically shown to be deadlock free. Additionally, it includes a new technique [<ref type="bib" rid="D06396">6</ref>] for modeling the timing of digital systems that guarantees the accuracy of the simulation results. In the discipline of computer-aided design of digital systems, a behavior model refers to a compact and executable representation of the activities of a complex digital component or an entire digital system such as the Motorola 68000, expressed through a high-level hardware description language such as ADLIB [<ref type="bib" rid="D06392">2</ref>] or VHDL [<ref type="bib" rid="D06391">1</ref>]. Behavior models are popular because of their flexibility; however, they execute excruciatingly slow on uniprocessor computers. The approach presented in this paper has the potential to significantly reduce the execution time through concurrent execution on multiple processors. In this approach, a design is first partitioned by the user and the behavior models corresponding to the digital components of each partition are assigned to a unique processor of the parallel processor system. In course of execution, a behavior model receives signal transitions from other models through the explicit communication links, termed protocols, that model the connectivity of the digital design. Every model is completely unaware of the existence of other entities in the simulation system and is solely responsible for accurately scheduling its execution on the underlying processor. Thus, scheduling is distributed in the models and the approach, like the Chandy–Misra algorithm [<ref type="bib" rid="D063911">11</ref>], does not require any knowledge of the global simulation time. However, this paper differs from [<ref type="bib" rid="D063911">11</ref>] in that 1) it redefines the notion of deadlock in nonfeedback systems [<ref type="bib" rid="D063911">11</ref>] as starvation and proposes a new methodology to address it, and 2) introduces a new mode—“exception-mode”, of execution to prevent the occurrence of deadlock in feedback systems. This paper also reports on an implementation of the approach on the 64 node Bell Labs hypercube [<ref type="bib" rid="D06393">3</ref>], [<ref type="bib" rid="D06394">4</ref>] and the ARMSTRONG [<ref type="bib" rid="D063924">24</ref>] system at Brown University. Performance statistics based on the simulation of several representative designs indicate that the approach achieves significant speedup for realistic combinational behavior-level digital systems while the speedup for sequential designs is a function of the system and other factors.</p><p><it>Index Terms—</it>Distributed simulation, digital systems simulation, asynchronous algorithms, parallel processors.</p>

M. Yu and S. Ghosh, "An Asynchronous Distributed Approach for the Simulation of Behavior-Level Models on Parallel Processors," in IEEE Transactions on Parallel & Distributed Systems, vol. 6, no. , pp. 639-652, 1995.
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