Hardware/Software Co-Design of an Accelerator for FV Homomorphic Encryption Scheme Using Karatsuba Algorithm
Issue No. 03 - March (2018 vol. 67)
Vincent Migliore , University Bretagne-Sud, UMR CNRS 6285, Lab-STICC, Lorient, France
Maria Mendez Real , University Bretagne-Sud, UMR CNRS 6285, Lab-STICC, Lorient, France
Vianney Lapotre , University Bretagne-Sud, UMR CNRS 6285, Lab-STICC, Lorient, France
Arnaud Tisserand , CNRS-IRISA-University Rennes 1, Lannion, France
Caroline Fontaine , CNRS, and Institut Mines-Telecom/Telecom Bretagne, UMR CNRS 6285, Lab-STICC, Brest, France
Guy Gogniat , University Bretagne-Sud, UMR CNRS 6285, Lab-STICC, Lorient, France
Somewhat Homomorphic Encryption (SHE) schemes allow to carry out operations on data in the cipher domain. In a cloud computing scenario, personal information can be processed secretly, inferring a high level of confidentiality. For many years, practical parameters of SHE schemes were overestimated, leading to only consider the FFT algorithm to accelerate SHE in hardware. Nevertheless, recent work demonstrates that parameters can be lowered without compromising the security
 . Following this trend, this work investigates the benefits of using Karatsuba algorithm instead of FFT for the Fan-Vercauteren (FV) Homomorphic Encryption scheme. The proposed accelerator relies on an hardware/software co-design approach, and is designed to perform fast arithmetic operations on degree 2,560 polynomials with 135 bits coefficients, allowing to compute small algorithms homomorphically. Compared to a functionally equivalent design using FFT, our accelerator performs an homomorphic multiplication in 11.9 ms instead of 15.46 ms, and halves the size of logic utilization and registers on the FPGA.
Hardware, Encryption, Acceleration, Software algorithms, Field programmable gate arrays
V. Migliore, M. M. Real, V. Lapotre, A. Tisserand, C. Fontaine and G. Gogniat, "Hardware/Software Co-Design of an Accelerator for FV Homomorphic Encryption Scheme Using Karatsuba Algorithm," in IEEE Transactions on Computers, vol. 67, no. 3, pp. 335-347, 2018.