Issue No. 11 - Nov. (2017 vol. 66)
Kalidas Ganesh , Department of Electrical and Computer Engineering, University of Texas at San Antonio, San Antonio, TX
Youngjae Kim , Department of Computer Science and Engineering, Sogang University, Seoul, South Korea
Monobrata Debnath , Department of Electrical and Computer Engineering, University of Texas at San Antonio, San Antonio, TX
Sungyong Park , Department of Computer Science and Engineering, Sogang University, Seoul, South Korea
Junghee Lee , Department of Electrical and Computer Engineering, University of Texas at San Antonio, San Antonio, TX
Flash memory-based SSD-RAIDs are swiftly replacing conventional hard disk drives by exhibiting improved performance and stability, especially in I/O-intensive environments. However, the variations in latency and throughput occurring due to uncoordinated internal garbage collection cripples further boosting of performance. In addition, the unwanted variations in each SSD can influence the overall performance of the entire flash storage adversely. This performance bottleneck can be essentially reduced by an internal write cache in the RAID controller designed prudently by considering the crucial device characteristics. The state-of-the-art cache write for the RAID controller fails to incorporate device characteristics of flash memory-based SSDs and mitigates the performance gain. In this paper, we propose a novel cache design namely Layout-Aware Write Cache (LAWC) to overcome the performance barrier inculcated by independent garbage collections. LAWC implements (i) improved I/O scheduling for logically partitioned write caches, (ii) a destage write synchronization mechanism to allow individual write caches to flush write blocks into the SSD array in a coordinated manner, and (iii) a two-level hybrid cache algorithm utilizing small front level cache for the improved write cache efficiency. LAWC shows significant reduction in response time by 82.39 percent on RAID-0 and 68.51 percent on RAID-5 types of SSDs when compared with state-of-the-art write cache algorithms.
Synchronization, Strips, Performance evaluation, Scheduling, Bandwidth, Arrays, Time factors
K. Ganesh, Y. Kim, M. Debnath, S. Park and J. Lee, "LAWC: Optimizing Write Cache Using Layout-Aware I/O Scheduling for All Flash Storage," in IEEE Transactions on Computers, vol. 66, no. 11, pp. 1890-1902, 2017.