The Community for Technology Leaders
Issue No. 04 - April (2016 vol. 65)
ISSN: 0018-9340
pp: 1090-1102
Ren-Shuo Liu , Department of Computer Science and Information Engineering, National Taiwan University, Taipei, Taiwan.
Meng-Yen Chuang , Department of Computer Science and Information Engineering, National Taiwan University, Taipei, Taiwan.
Chia-Lin Yang , Department of Computer Science and Information Engineering, Graduate Institute of Networking and Multimedia, and Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan
Cheng-Hsuan Li , Department of Computer Science and Information Engineering, National Taiwan University, Taipei, Taiwan.
Kin-Chu Ho , Macronix International Co., Ltd. and the Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan
Hsiang-Pang Li , Macronix International Co., Ltd., Hsinchu, Taiwan
ABSTRACT
NAND flash-based solid-state drives (SSDs), which can serve as the caches of hard disk drives, have gained popularity in large-scale, high-performance storage. A type of advanced error correction code for SSDs, low-density parity-check (LDPC), is required to mitigate a considerable number of errors in the raw data of NAND flash. However, LDPC imposes read performanceoverhead due to the complex decoding procedure of LDPC. In this paper, we propose an error-correcting cache (EC-Cache) that exploits “error locality”, a characteristic of NAND flash memory, to improve the read performance of SSDs. We use the term “error locality” to refer to the property that the majority of errors in reads to the same flash page appear at the same positions until thepage is erased. By caching detected errors, we can correct a significant portion of errors in the requested flash page prior to the LDPC decoding process. This design significantly reduces LDPC decoding overhead because the latency of LDPC is correlated with thenumber of errors in the input data. We conduct experiments, including flash characterization, LDPC simulation, and SSD simulation,to evaluate EC-Cache. The experimental results demonstrate that EC-Cache can improve the read performance of LDPC-based SSDs by up to $2.6\times$ .
INDEX TERMS
Ash, Decoding, Random access memory, Sensors, Iterative decoding, Flash memories,bit error and cache, NAND flash memory, solid-state drive (SSD), low-density parity-check (LDPC),and cache, NAND flash memory, solid-state drive (SSD), low-density parity-check (LDPC), bit error
CITATION
Ren-Shuo Liu, Meng-Yen Chuang, Chia-Lin Yang, Cheng-Hsuan Li, Kin-Chu Ho, Hsiang-Pang Li, "Improving Read Performance of NAND Flash SSDs by Exploiting Error Locality", IEEE Transactions on Computers, vol. 65, no. , pp. 1090-1102, April 2016, doi:10.1109/TC.2014.2345387