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Issue No. 04 - April (2013 vol. 62)
ISSN: 0018-9340
pp: 744-757
R. Azarderakhsh , Dept. of Electr. & Comput. Eng., Univ. of Western Ontario, London, ON, Canada
A. Reyhani-Masoleh , Dept. of Electr. & Comput. Eng., Univ. of Western Ontario, London, ON, Canada
The extensive rise in the number of resource constrained wireless devices and the needs for secure communications with the servers imply fast and efficient cryptographic computations for both parties. Efficient hardware implementation of arithmetic operations over finite field using Gaussian normal basis is attractive for public key cryptography as it provides free squarings. In this paper, we first present two low-complexity digit-level multiplier architectures. It is shown that the proposed multipliers outperform the existing Gaussian normal basis (GNB) multiplier structures available in the literature. Then, for the first time, using these two architectures, we propose a new digit-level hybrid multiplier which performs two successive multiplications with the same latency as the one for one multiplication. We have studied the efficiency of the proposed hybrid architecture in terms of area and time delay for different digit sizes. The main advantage of this new hybrid architecture is to speed up exponentiation and point multiplication whenever double-multiplication is required and the traditional schemes fail due to the data dependencies. We have investigated the applicability of the proposed hybrid structure to reduce the latency of exponentiation-based cryptosystems. Our analysis and timing results show that the expected acceleration in double-exponentiation is considerable. Prototypes of the presented low-complexity multiplier architectures and the proposed hybrid architecture are implemented and experimental results are presented.
public key cryptography, Gaussian processes, data dependency, low-complexity digit-level multiplier architectures, single multiplications, hybrid-double multiplications, Gaussian normal basis, resource constrained wireless devices, communication security, cryptographic computations, public key cryptography, GNB multiplier structures, digit-level hybrid multiplier, exponentiation-based cryptosystems, point multiplication, Gaussian processes, Computer architecture, Registers, Logic gates, Complexity theory, Clocks, Cryptography, double-exponentiation, Cryptosystems, Gaussian normal basis, double-multiplication, digit-level multiplier
R. Azarderakhsh, A. Reyhani-Masoleh, "Low-Complexity Multiplier Architectures for Single and Hybrid-Double Multiplications in Gaussian Normal Bases", IEEE Transactions on Computers, vol. 62, no. , pp. 744-757, April 2013, doi:10.1109/TC.2012.22
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