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Issue No.04 - April (2013 vol.62)
pp: 644-661
Haibo Zeng , Dept. of Electr. & Comput. Eng., McGill Univ., Montreal, QC, Canada
Marco Di Natale , Scuola Superiore S. Anna, TECIP Inst., Pisa, Italy
In the design of time-critical applications, schedulability analysis is used to define the feasibility region of tasks with deadlines, so that optimization techniques can find the best design solution within the timing constraints. The formulation of the feasibility region based on the response time calculation requires many integer variables and is too complex for solvers. Approximation techniques have been used to define a convex subset of the feasibility region, used in conjunction with a branch and bound approach to compute suboptimal solutions for optimal task period selection, priority assignment, or placement of tasks onto CPUs. In this paper, we provide an improved and simpler real-time schedulability test that allows an exact and efficient definition of the feasibility region in Mixed Integer Linear Programming (MILP) optimization. Our method requires a significantly smaller number of binary variables and is viable for the treatment of industrial-size problem, as shown by the experiments.
tree searching, approximation theory, design engineering, integer programming, linear programming, processor scheduling, industrial-size problem, real-time feasibility region, design optimization, time-critical applications, schedulability analysis, timing constraints, response time calculation, integer variables, approximation techniques, branch and bound approach, optimal task period selection, priority assignment, task placement, real-time schedulability test, mixed integer linear programming optimization, MILP, binary variables, Optimization, Silicon, Time factors, Redundancy, Algorithm design and analysis, Real time systems, Indexes, mixed integer linear programming, Real-time systems, schedulability analysis
Haibo Zeng, Marco Di Natale, "An Efficient Formulation of the Real-Time Feasibility Region for Design Optimization", IEEE Transactions on Computers, vol.62, no. 4, pp. 644-661, April 2013, doi:10.1109/TC.2012.21
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