Issue No. 02 - Feb. (2013 vol. 62)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TC.2012.157
Hansu Cho , Samsung Electronics, Suwon-City
Lochi Yu , University of Costa Rica, San Pedro
Samar Abdi , Concordia University, Montreal
This paper presents methods for automatic generation of models of Transducer, a highly flexible communication module for interfacing Multiprocessor System-on-Chip (MPSoC) components. We describe the transducer architecture, comprising the bus interface, high-level communication controllers and buffer management blocks. The well-defined architecture of the transducer enables automatic generation of its Transaction-level and Register-transfer level (RTL) models. Moreover, the simple interface of the transducer provides for a well-defined software interface, making it easy to update the software after changes in MPSoC platform. Our experimental results show that MPSoC design for industrial-size applications, such as MP3 decoder and JPEG encoder, greatly benefits from automatic generation of transducer models. We found productivity gains of 9-23× due to significant savings in modeling effort. On the quality axis, we show that MPSoC communication design using automatically generated transducers has very little overhead in communication delay over a fully connected point-to-point communication architecture. Finally, we show that our automatically generated TLMs greatly reduce the system-level modeling time and provide a fast executable model for early functional validation.
Transducers, Computer architecture, Protocols, Abstracts, Time varying systems, Time domain analysis, Software, communication architecture, System-level modeling, Multiprocessor System-on-Chip Design
L. Yu, H. Cho and S. Abdi, "Automatic Generation of Transducer Models for Bus-Based MPSoC Design," in IEEE Transactions on Computers, vol. 62, no. , pp. 211-224, 2013.