Issue No. 01 - Jan. (2013 vol. 62)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TC.2011.225
Zhimin Chen , Virginia Polytechnic Institute and State University, Blacksburg
Ambuj Sinha , Virginia Polytechnic Institute and State University, Blacksburg
Patrick Schaumont , Virginia Polytechnic Institute and State University, Blacksburg
Side-Channel Attacks (SCAs) can break a cryptographic implementation within a very short time, and therefore, has become a practical threat to embedded security. This work presents Virtual Secure Circuit (VSC) as a software countermeasure to SCA. VSC provides protection to software by emulating WDDL, an SCA-resistant hardware circuit style. VSC is algorithm independent. This enables designers to protect different cryptographic software with only one solution. This work proposes the concept of VSC together with two implementation schemes. One scheme is based on a custom-instruction single-core processor architecture and the other on a dual-core architecture. Correspondingly, we built two prototypes on FPGA systems. Experiments with real-world side-channel power and electromagnetic attacks demonstrate that, compared with the unprotected software, VSC on single-core processor provides 20 times security improvement. The experiments also show that, although VSC on dual-core processor does not thwart electromagnetic attacks, it offers more than 25 times security improvement against power attacks. We conclude that VSC is comparable in security improvement to WDDL, but is more flexible and has much lower hardware cost.
Cryptography, Software, Programming, Power dissipation, Logic gates, Algorithm design and analysis, VSC, Side-channel attacks, dual-rail precharge technique, virtual secure circuit
A. Sinha, Z. Chen and P. Schaumont, "Using Virtual Secure Circuit to Protect Embedded Software from Side-Channel Attacks," in IEEE Transactions on Computers, vol. 62, no. , pp. 124-136, 2013.