Issue No. 02 - February (2012 vol. 61)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TC.2011.152
Carlos Luque , Universitat Politecnica de Catalunya / Barcelona Supercomputing Center, Barcelona
Miquel Moreto , Universitat Politecnica de Catalunya, and Barcelona Supercomputing Center, Barcelona
Francisco J. Cazorla , Spanish National Research Council, and Barcelona Supercomputing Center, Barcelona
Roberto Gioiosa , Barcelona Supercomputing Center, Barcelona
Alper Buyuktosunoglu , IBM T.J. Watson Research Center, New York
Mateo Valero , Universitat Politecnica de Catalunya, and Barcelona Supercomputing Center, Barcelona
In single-threaded processors and Symmetric Multiprocessors the execution time of a task depends on the other tasks it runs with (the workload), since the Operating System (OS) time shares the CPU(s) between tasks in the workload. However, the time accounted to a task is roughly the same regardless of the workload in which the task runs in, since the OS takes into account those periods in which the task is not scheduled onto a CPU. Chip Multiprocessors (CMPs) introduce complexities when accounting CPU utilization, since the CPU time to account to a task not only depends on the time that the task is scheduled onto a CPU, but also on the amount of hardware resources it receives during that period. And given that in a CMP hardware resources are dynamically shared between tasks, the CPU time accounted to a task in a CMP depends on the workload it executes in. This is undesirable because the same task with the same input data set may be accounted differently depending on the workload it executes. In this paper, we identify how an inaccurate measurement of the CPU utilization affects several key aspects of the system such as OS statistics or the charging mechanism in data centers. We propose a new hardware CPU accounting mechanism to improve the accuracy when measuring the CPU utilization in CMPs and compare it with the previous accounting mechanisms. Our results show that currently known mechanisms lead to a 16 percent average error when it comes to CPU utilization accounting. Our proposal reduces this error to less than 2.8 percent in a modeled 8-core processor system.
CPU accounting, chip-multiprocessor, shared last level of cache, cache partitioning algorithms.
M. Moreto, R. Gioiosa, M. Valero, C. Luque, A. Buyuktosunoglu and F. J. Cazorla, "CPU Accounting for Multicore Processors," in IEEE Transactions on Computers, vol. 61, no. , pp. 251-264, 2011.