A Management Strategy for the Reliability and Performance Improvement of MLC-Based Flash-Memory Storage Systems
Issue No. 03 - March (2011 vol. 60)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TC.2010.126
Yuan-Hao Chang , National Taipei University of Technology, Taipei, Taiwan
Tei-Wei Kuo , National Taiwan University, Taipei, Taiwan
Cost has been a major driving force in the development of the flash-memory technology. Because of this, serious challenges are now faced for future products on reliability and performance requirements. In this work, we propose a management strategy to resolve the reliability and performance problems of many flash-memory products. A three-level address translation architecture with an adaptive block mapping mechanism is proposed to accelerate the address translation process with a limited amount of the RAM usage. Parallelism of operations over multiple chips is also explored with the considerations of the write constraints of advanced multilevel cell flash-memory chips. The capability of the proposed approach is analyzed with reliability considerations and evaluated by experiments over realistic workloads with respect to the reliability and performance improvement.
Flash-memory management software, disposable flash memory, MLC flash memory, performance enhancement, reliability enhancement, address translation, update commitment.
Yuan-Hao Chang, Tei-Wei Kuo, "A Management Strategy for the Reliability and Performance Improvement of MLC-Based Flash-Memory Storage Systems", IEEE Transactions on Computers, vol. 60, no. , pp. 305-320, March 2011, doi:10.1109/TC.2010.126