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Issue No.02 - February (2011 vol.60)

pp: 157-164

Sylvie Boldo , INRIA Saclay, Orsay and University Parid-Sud, CNRS, Orsay

Jean-Michel Muller , CNRS, Université de Lyon, Lyon and INRIA/Arénaire

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TC.2010.139

ABSTRACT

The fused multiply accumulate-add (FMA) instruction, specified by the IEEE 754-2008 Standard for Floating-Point Arithmetic, eases some calculations, and is already available on some current processors such as the Power PC or the Itanium. We first extend an earlier work on the computation of the exact error of an FMA (by giving more general conditions and providing a formal proof). Then, we present a new algorithm that computes an approximation to the error of an FMA, and provide error bounds and a formal proof for that algorithm.

INDEX TERMS

Floating-point arithmetic, FMA, fused multiply-add, computer arithmetic, error-free transforms, error compensation, error of an FMA.

CITATION

Sylvie Boldo, Jean-Michel Muller, "Exact and Approximated Error of the FMA",

*IEEE Transactions on Computers*, vol.60, no. 2, pp. 157-164, February 2011, doi:10.1109/TC.2010.139REFERENCES

- [1] R.C. Agarwal, F.G. Gustavson, and M.S. Schmookler, "Series Approximation Methods for Divide and Square Root in the POWER3 Processor,"
Proc. 14th IEEE Symp. Computer Arithmetic (ARITH-14 '99), pp. 116-123, Apr. 1999.- [2] E. Hokenek, R.K. Montoye, and P.W. Cook, "Second-Generation RISC Floating Point with Multiply-Add Fused,"
IEEE J. Solid-State Circuits, vol. 25, no. 5, pp. 1207-1213, Oct. 1990.- [3] R.K. Montoye, E. Hokonek, and S.L. Runyan, "Design of the IBM RISC System/6000 Floating-Point Execution Unit,"
IBM J. Research and Development, vol. 34, no. 1, pp. 59-70, 1990.- [4] P.W. Markstein, "Computation of Elementary Functions on the IBM RISC System/6000 Processor,"
IBM J. Research and Development, vol. 34, no. 1, pp. 111-119, Jan. 1990.- [5] J.-M. Muller, N. Brisebarre, F. de Dinechin, C.-P. Jeannerod, V. Lefèvre, G. Melquiond, N. Revol, D. Stehlé, and S. Torres,
Handbook of Floating-Point Arithmetic. Birkhauser, 2009.- [6] R.-C. Li, S. Boldo, and M. Daumas, "Theorems on Efficient Argument Reduction,"
Proc. 16th IEEE Symp. Computer Arithmetic (ARITH-16 '03), pp. 129-136, June 2003.- [7] R.M. Jessani and C.H. Olson, "The Floating-Point Unit of the PowerPC 603e Microprocessor,"
IBM J. Research and Development, vol. 40, no. 5, pp. 559-566, 1996.- [8] G. Kane,
PA-RISC 2.0 Architecture. Prentice Hall PTR, 1995.- [9] A. Kumar, "The HP PA-8000 RISC CPU,"
IEEE Micro, vol. 17, no. 2, pp. 27-32, Mar./Apr. 1997.- [10] M. Cornea, J. Harrison, and P.T.P. Tang,
Scientific Computing on Itanium-Based Systems. Intel Press, 2002.- [11] E. Quinnell, E.E. Swartzlander, and C. Lemonds, "Floating-Point Fused Multiply-Add Architectures"
Proc. 41st Asilomar Conf. Signals, Systems, and Computers, pp. 331-337, Nov. 2007.- [12] IEEE CS,
IEEE Standard for Floating-Point Arithmetic, IEEE Standard 754-2008, http://ieeexplore.ieee.org/servlet opac?punumber=4610933 , Aug. 2008.- [13] O. Møller, "Quasi Double-Precision in Floating-Point Addition,"
BIT Numerical Math., vol. 5, pp. 37-50, 1965.- [14] D. Knuth,
The Art of Computer Programming, third ed. vol. 2. Addison-Wesley, 1998.- [15] T.J. Dekker, "A Floating-Point Technique for Extending the Available Precision,"
Numerische Mathematik, vol. 18, no. 3, pp. 224-242, 1971.- [16] S. Boldo and M. Daumas, "Representable Correcting Terms for Possibly Underflowing Floating Point Operations,"
Proc. 16th Symp. Computer Arithmetic (ARITH-16 '03), pp. 79-86, http://perso.ens-lyon.fr/marc.daumas/SoftArith BolDau03a.pdf, 2003.- [17] S. Boldo, "Pitfalls of a Full Floating-Point Proof: Example on the Formal Proof of the Veltkamp/Dekker algorithms,"
Proc. Third Int'l Joint Conf. Automated Reasoning, pp. 52-66, 2006.- [18] S. Boldo and J.-M. Muller, "Some Functions Computable with a Fused-Mac,"
Proc. 17th IEEE Symp. Computer Arithmetic (ARITH-17 '05), June 2005.- [19] N. Louvet, "Algorithmes Compensés en Arithmétique Flottante: Précision, Validation, Performances," PhD dissertation, Univ. de Perpignan, Nov. 2007.
- [20] S. Graillat, P. Langlois, and N. Louvet, "Improving the Compensated Horner Scheme with a Fused Multiply and Add,"
Proc. 21st Ann. ACM Symp. Applied Computing (ACM '06), pp. 1323-1327, 2006.- [21] Y. Bertot and P. Castéran,
Interactive Theorem Proving and Program Development. Coq'Art: The Calculus of Inductive Constructions. Springer Verlag, 2004.- [22] T. Ogita, S.M. Rump, and S. Oishi, "Accurate Sum and Dot Product,"
SIAM J. Scientific Computing, vol. 26, no. 6, pp. 1955-1988, 2005.- [23] S. Boldo, M. Daumas, C. Moreau-Finot, and L. Théry, "Computer Validated Proofs of a Toolset for Adaptable Arithmetic," École Normale Supérieure de Lyon, technical report, http://arxiv.org/pdf/cs.MS0107025, 2001.
- [24] P.H. Sterbenz,
Floating-Point Computation. Prentice-Hall, 1974.- [25] W. Ware et al., "Soviet Computer Technology,"
Comm. ACM, vol. 3, pp. 131-166, Mar. 1960. |