Issue No. 08 - August (2010 vol. 59)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TC.2010.77
Harold Ishebabi , University of Potsdam, Potsdam
Christophe Bobda , University of Potsdam, Potsdam
Flexible Chip Multiprocessor (CMP) systems are implemented on field programmable devices to exploit both task-level parallelism and architecture customization for parallel programs. The idea is to simultaneously allocate processor resources, map and schedule tasks to them, and to allocate one or several intertask communication resources such that the throughput or execution time is optimized. The design space of such systems is huge, requiring means to automatically optimize design parameters so as to facilitate wide and disciplined explorations. The complexity resulting from corresponding system modeling necessitates the use of optimization heuristics to cope with excessively long runtime for large problem instances. This paper provides a formal proof for the existence of optimum linear time synthesis algorithms for one of two classes of problem instances, and proceeds to present three greedy-like heuristics which exploit the structure of the synthesis problem. A comparison of results for real-time and non-real-time parallel programs is given against integer linear programming, where a synthesis strategy is proposed to achieve good results.
Reconfigurable computing, chip multiprocessor systems, parallel programs.
H. Ishebabi and C. Bobda, "Heuristics for Flexible CMP Synthesis," in IEEE Transactions on Computers, vol. 59, no. , pp. 1091-1104, 2010.