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Issue No. 04 - April (2010 vol. 59)
ISSN: 0018-9340
pp: 457-467
J.-H.R. Jiang , Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Chih-Chun Lee , Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
A. Mishchenko , Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Berkeley, CA, USA
Chung-Yang Huang , Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Functional dependency is concerned with rewriting a Boolean function f as a function h over a set of base functions {g1,¿,gn}, i.e., f = h(g1,¿,gn). It plays an important role in many aspects of electronic design automation (EDA). Prior approaches to the exploration of functional dependency are based on binary decision diagrams (BDDs), which may not be easily scalable to large designs. This paper formulates both single-output and multiple-output functional dependencies as satisfiability (SAT) solving and exploits extensively the capability of a modern SAT solver. Thereby, functional dependency can be detected effectively through incremental SAT solving, and the dependency function h, if it exists, is obtained through Craig interpolation. The proposed method enables (1) scalable detection of functional dependency, (2) fast enumeration of dependency function under a large set of candidate base functions, and (3) potential application to large-scale logic synthesis and formal verification. Experimental results show that the proposed method is far superior to prior work and scales well in dealing with the largest ISCAS and ITC benchmark circuits with up to 200 K gates.
logic design, binary decision diagrams, Boolean functions, computability, electronic design automation,dependency function, functional dependency, rewriting a Boolean function, base functions, electronic design automation, binary decision diagrams, single-output functional dependencies, multiple-output functional dependencies, satisfiability, SAT solver, large-scale logic synthesis, formal verification,Boolean functions, Data structures, Interpolation, Data mining, Probability density function, Junctions, Cost accounting,optimization., Automatic synthesis, design aids, logic design
J.-H.R. Jiang, Chih-Chun Lee, A. Mishchenko, Chung-Yang Huang, "To SAT or Not to SAT: Scalable Exploration of Functional Dependency", IEEE Transactions on Computers, vol. 59, no. , pp. 457-467, April 2010, doi:10.1109/TC.2010.12
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